From 735e6c58be214233a7f149b25c68f5743bb7d419 Mon Sep 17 00:00:00 2001 From: Annomatg <47226753+Annomatg@users.noreply.github.com> Date: Sun, 3 Feb 2019 21:21:14 +0100 Subject: [PATCH] Reduce Inst::NumArgs calls / opcodes: Prefer std::vector to std::map (#425) * Don't call Inst::NumArgs in a loop conditional * opcodes: Prefer a simple std::vector instead of a std::map --- src/backend/x64/reg_alloc.cpp | 3 ++- src/frontend/ir/opcodes.cpp | 20 ++++++++++---------- src/ir_opt/verification_pass.cpp | 6 ++++-- 3 files changed, 16 insertions(+), 13 deletions(-) diff --git a/src/backend/x64/reg_alloc.cpp b/src/backend/x64/reg_alloc.cpp index 30b3dd6c..c9bdc53d 100644 --- a/src/backend/x64/reg_alloc.cpp +++ b/src/backend/x64/reg_alloc.cpp @@ -229,7 +229,8 @@ bool Argument::IsInMemory() const { RegAlloc::ArgumentInfo RegAlloc::GetArgumentInfo(IR::Inst* inst) { ArgumentInfo ret = {Argument{*this}, Argument{*this}, Argument{*this}, Argument{*this}}; - for (size_t i = 0; i < inst->NumArgs(); i++) { + const size_t num_args = inst->NumArgs(); + for (size_t i = 0; i < num_args; i++) { const IR::Value& arg = inst->GetArg(i); ret[i].value = arg; if (!arg.IsImmediate() && !IsValuelessType(arg.GetType())) { diff --git a/src/frontend/ir/opcodes.cpp b/src/frontend/ir/opcodes.cpp index af038bac..b4c77ecc 100644 --- a/src/frontend/ir/opcodes.cpp +++ b/src/frontend/ir/opcodes.cpp @@ -45,34 +45,34 @@ constexpr Type NZCV = Type::NZCVFlags; constexpr Type Cond = Type::Cond; constexpr Type Table = Type::Table; -static const std::map opcode_info {{ -#define OPCODE(name, type, ...) { Opcode::name, { #name, type, { __VA_ARGS__ } } }, -#define A32OPC(name, type, ...) { Opcode::A32##name, { #name, type, { __VA_ARGS__ } } }, -#define A64OPC(name, type, ...) { Opcode::A64##name, { #name, type, { __VA_ARGS__ } } }, +static const std::vector opcode_info { +#define OPCODE(name, type, ...) { #name, type, { __VA_ARGS__ } }, +#define A32OPC(name, type, ...) { #name, type, { __VA_ARGS__ } }, +#define A64OPC(name, type, ...) { #name, type, { __VA_ARGS__ } }, #include "opcodes.inc" #undef OPCODE #undef A32OPC #undef A64OPC -}}; +}; } // namespace OpcodeInfo Type GetTypeOf(Opcode op) { - return OpcodeInfo::opcode_info.at(op).type; + return OpcodeInfo::opcode_info.at(static_cast(op)).type; } size_t GetNumArgsOf(Opcode op) { - return OpcodeInfo::opcode_info.at(op).arg_types.size(); + return OpcodeInfo::opcode_info.at(static_cast(op)).arg_types.size(); } Type GetArgTypeOf(Opcode op, size_t arg_index) { - return OpcodeInfo::opcode_info.at(op).arg_types.at(arg_index); + return OpcodeInfo::opcode_info.at(static_cast(op)).arg_types.at(arg_index); } std::string GetNameOf(Opcode op) { - if (OpcodeInfo::opcode_info.count(op) == 0) + if (OpcodeInfo::opcode_info.size() <= static_cast(op)) return fmt::format("Unknown Opcode {}", static_cast(op)); - return OpcodeInfo::opcode_info.at(op).name; + return OpcodeInfo::opcode_info.at(static_cast(op)).name; } std::ostream& operator<<(std::ostream& o, Opcode opcode) { diff --git a/src/ir_opt/verification_pass.cpp b/src/ir_opt/verification_pass.cpp index ef590b45..d81df787 100644 --- a/src/ir_opt/verification_pass.cpp +++ b/src/ir_opt/verification_pass.cpp @@ -18,7 +18,8 @@ namespace Dynarmic::Optimization { void VerificationPass(const IR::Block& block) { for (const auto& inst : block) { - for (size_t i = 0; i < inst.NumArgs(); i++) { + const size_t num_args = inst.NumArgs(); + for (size_t i = 0; i < num_args; i++) { IR::Type t1 = inst.GetArg(i).GetType(); IR::Type t2 = IR::GetArgTypeOf(inst.GetOpcode(), i); if (!IR::AreTypesCompatible(t1, t2)) { @@ -30,7 +31,8 @@ void VerificationPass(const IR::Block& block) { std::map actual_uses; for (const auto& inst : block) { - for (size_t i = 0; i < inst.NumArgs(); i++) { + const size_t num_args = inst.NumArgs(); + for (size_t i = 0; i < num_args; i++) { if (!inst.GetArg(i).IsImmediate()) { actual_uses[inst.GetArg(i).GetInst()]++; }