From 7abd673a495483331abf9f605fc2bb9d6f0314e3 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 26 Jan 2018 12:00:27 -0500 Subject: [PATCH] A64: Zero upper 64 bits in ORN if using the 64-bit variant Resolves a TODO --- src/frontend/A64/translate/impl/simd_three_same.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/frontend/A64/translate/impl/simd_three_same.cpp b/src/frontend/A64/translate/impl/simd_three_same.cpp index ad27bbe4..15d93fe6 100644 --- a/src/frontend/A64/translate/impl/simd_three_same.cpp +++ b/src/frontend/A64/translate/impl/simd_three_same.cpp @@ -123,9 +123,12 @@ bool TranslatorVisitor::ORN_asimd(bool Q, Vec Vm, Vec Vn, Vec Vd) { auto operand1 = V(datasize, Vn); auto operand2 = V(datasize, Vm); - // TODO: This does not zero the upper 64 bits when datasize == 64. This may break future optimization passes. auto result = ir.VectorOr(operand1, ir.VectorNot(operand2)); + if (datasize == 64) { + result = ir.VectorZeroUpper(result); + } + V(datasize, Vd, result); return true;