From 84f1c9b7f4bda23ea36cce93614618240f6d83c4 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 18 Feb 2018 23:24:15 +0000 Subject: [PATCH] reg_alloc: Only exchange GPRs --- src/backend_x64/reg_alloc.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp index 10ef9b17..055f0ea3 100644 --- a/src/backend_x64/reg_alloc.cpp +++ b/src/backend_x64/reg_alloc.cpp @@ -34,10 +34,8 @@ static u64 ImmediateToU64(const IR::Value& imm) { } } -static bool IsSameHostLocClass(HostLoc a, HostLoc b) { - return (HostLocIsGPR(a) && HostLocIsGPR(b)) - || (HostLocIsXMM(a) && HostLocIsXMM(b)) - || (HostLocIsSpill(a) && HostLocIsSpill(b)); +static bool CanExchange(HostLoc a, HostLoc b) { + return HostLocIsGPR(a) && HostLocIsGPR(b); } // Minimum number of bits required to represent a type @@ -302,7 +300,7 @@ HostLoc RegAlloc::UseImpl(IR::Value use_value, HostLocList desired_locations) { } const HostLoc destination_location = SelectARegister(desired_locations); - if (IsSameHostLocClass(destination_location, current_location)) { + if (CanExchange(destination_location, current_location)) { Exchange(destination_location, current_location); } else { MoveOutOfTheWay(destination_location);