From 871617ac3bf742144aa810c9ba6040a534f54391 Mon Sep 17 00:00:00 2001
From: SachinVin <sachinvinayak2000@gmail.com>
Date: Sat, 27 Jul 2019 17:14:53 +0530
Subject: [PATCH] a64 emitter: Absolute Difference and add across vector
 instructions

---
 src/backend/A64/emitter/a64_emitter.cpp | 20 ++++++++++++++++++++
 src/backend/A64/emitter/a64_emitter.h   |  5 +++++
 2 files changed, 25 insertions(+)

diff --git a/src/backend/A64/emitter/a64_emitter.cpp b/src/backend/A64/emitter/a64_emitter.cpp
index 942a6ea0..d6605c9c 100644
--- a/src/backend/A64/emitter/a64_emitter.cpp
+++ b/src/backend/A64/emitter/a64_emitter.cpp
@@ -2841,6 +2841,10 @@ void ARM64FloatEmitter::ADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
     ASSERT(!(IsDouble(Rd) && esize == D));
     EmitThreeSame(0, static_cast<u32>(esize), 0b10000, Rd, Rn, Rm);
 }
+void ARM64FloatEmitter::ADDV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
+    ASSERT(esize != D);
+    Emit2RegMisc(IsQuad(Rd), 0, static_cast<u32>(esize), 0b100011011, Rd, Rn);
+}
 void ARM64FloatEmitter::SUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
     ASSERT(!(IsDouble(Rd) && esize == D));
     EmitThreeSame(1, static_cast<u32>(esize), 0b10000, Rd, Rn, Rm);
@@ -2956,6 +2960,22 @@ void ARM64FloatEmitter::REV32(u8 size, ARM64Reg Rd, ARM64Reg Rn) {
 void ARM64FloatEmitter::REV64(u8 size, ARM64Reg Rd, ARM64Reg Rn) {
     Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn);
 }
+void ARM64FloatEmitter::SABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
+    ASSERT(esize != D);
+    EmitThreeSame(0, static_cast<u32>(esize), 0b01110, Rd, Rn, Rm);
+}
+void ARM64FloatEmitter::UABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
+    ASSERT(esize != D);
+    EmitThreeSame(1, static_cast<u32>(esize), 0b01110, Rd, Rn, Rm);
+}
+void ARM64FloatEmitter::SADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
+    ASSERT(esize != D);
+    Emit2RegMisc(IsQuad(Rd), 0, static_cast<u32>(esize), 0b100000011, Rd, Rn);
+}
+void ARM64FloatEmitter::UADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
+    ASSERT(esize != D);
+    Emit2RegMisc(IsQuad(Rd), 1, static_cast<u32>(esize), 0b100000011, Rd, Rn);
+}
 void ARM64FloatEmitter::SHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
     ASSERT(!(IsDouble(Rd) && esize == D));
     EmitThreeSame(0, static_cast<u32>(esize), 0b0, Rd, Rn, Rm);
diff --git a/src/backend/A64/emitter/a64_emitter.h b/src/backend/A64/emitter/a64_emitter.h
index 14d7e45a..1f08f651 100644
--- a/src/backend/A64/emitter/a64_emitter.h
+++ b/src/backend/A64/emitter/a64_emitter.h
@@ -964,6 +964,7 @@ public:
 
     // Vector
     void ADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
+    void ADDV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
     void SUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
     void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
     void BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
@@ -999,6 +1000,10 @@ public:
     void REV16(u8 size, ARM64Reg Rd, ARM64Reg Rn);
     void REV32(u8 size, ARM64Reg Rd, ARM64Reg Rn);
     void REV64(u8 size, ARM64Reg Rd, ARM64Reg Rn);
+    void SABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
+    void UABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
+    void SADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
+    void UADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
     void SHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
     void UHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
     void SHSUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);