From b0230f7def1491dafd46ecd9d95b1c0827545e00 Mon Sep 17 00:00:00 2001
From: SachinVin <sachinvinayak2000@gmail.com>
Date: Sat, 25 Apr 2020 19:14:33 +0530
Subject: [PATCH] frontend/A32: remove decoder hack vfp instructions

---
 src/frontend/A32/decoder/vfp.h        |  4 ---
 src/frontend/A32/decoder/vfp2_a64.inc | 47 ---------------------------
 tests/A32/fuzz_arm.cpp                |  3 +-
 3 files changed, 1 insertion(+), 53 deletions(-)
 delete mode 100644 src/frontend/A32/decoder/vfp2_a64.inc

diff --git a/src/frontend/A32/decoder/vfp.h b/src/frontend/A32/decoder/vfp.h
index 660ef50a..ac63f54c 100644
--- a/src/frontend/A32/decoder/vfp.h
+++ b/src/frontend/A32/decoder/vfp.h
@@ -25,11 +25,7 @@ std::optional<std::reference_wrapper<const VFPMatcher<V>>> DecodeVFP(u32 instruc
     static const std::vector<VFPMatcher<V>> table = {
 
 #define INST(fn, name, bitstring) Decoder::detail::detail<VFPMatcher<V>>::GetMatcher(&V::fn, name, bitstring),
-#ifdef ARCHITECTURE_Aarch64
-#include "vfp2_a64.inc"
-#else
 #include "vfp.inc"
-#endif
 #undef INST
 
     };
diff --git a/src/frontend/A32/decoder/vfp2_a64.inc b/src/frontend/A32/decoder/vfp2_a64.inc
deleted file mode 100644
index 269a1e80..00000000
--- a/src/frontend/A32/decoder/vfp2_a64.inc
+++ /dev/null
@@ -1,47 +0,0 @@
-// cccc1110________----101-__-0----
-
-// Floating-point three-register data processing instructions
-INST(vfp_VMLA,             "VMLA",                    "cccc11100D00nnnndddd101zN0M0mmmm") // VFPv2
-INST(vfp_VMLS,             "VMLS",                    "cccc11100D00nnnndddd101zN1M0mmmm") // VFPv2
-INST(vfp_VNMLS,            "VNMLS",                   "cccc11100D01nnnndddd101zN0M0mmmm") // VFPv2
-INST(vfp_VNMLA,            "VNMLA",                   "cccc11100D01nnnndddd101zN1M0mmmm") // VFPv2
-INST(vfp_VMUL,             "VMUL",                    "cccc11100D10nnnndddd101zN0M0mmmm") // VFPv2
-INST(vfp_VNMUL,            "VNMUL",                   "cccc11100D10nnnndddd101zN1M0mmmm") // VFPv2
-INST(vfp_VADD,             "VADD",                    "cccc11100D11nnnndddd101zN0M0mmmm") // VFPv2
-INST(vfp_VSUB,             "VSUB",                    "cccc11100D11nnnndddd101zN1M0mmmm") // VFPv2
-INST(vfp_VDIV,             "VDIV",                    "cccc11101D00nnnndddd101zN0M0mmmm") // VFPv2
-
-// Floating-point move instructions
-INST(vfp_VMOV_u32_f64,     "VMOV (core to f64)",      "cccc11100000ddddtttt1011D0010000") // VFPv2
-INST(vfp_VMOV_f64_u32,     "VMOV (f64 to core)",      "cccc11100001nnnntttt1011N0010000") // VFPv2
-INST(vfp_VMOV_u32_f32,     "VMOV (core to f32)",      "cccc11100000nnnntttt1010N0010000") // VFPv2
-INST(vfp_VMOV_f32_u32,     "VMOV (f32 to core)",      "cccc11100001nnnntttt1010N0010000") // VFPv2
-INST(vfp_VMOV_2u32_2f32,   "VMOV (2xcore to 2xf32)",  "cccc11000100uuuutttt101000M1mmmm") // VFPv2
-INST(vfp_VMOV_2f32_2u32,   "VMOV (2xf32 to 2xcore)",  "cccc11000101uuuutttt101000M1mmmm") // VFPv2
-INST(vfp_VMOV_2u32_f64,    "VMOV (2xcore to f64)",    "cccc11000100uuuutttt101100M1mmmm") // VFPv2
-INST(vfp_VMOV_f64_2u32,    "VMOV (f64 to 2xcore)",    "cccc11000101uuuutttt101100M1mmmm") // VFPv2
-INST(vfp_VMOV_reg,         "VMOV (reg)",              "cccc11101D110000dddd101z01M0mmmm") // VFPv2
-
-// Floating-point other instructions
-INST(vfp_VABS,             "VABS",                    "cccc11101D110000dddd101z11M0mmmm") // VFPv2
-INST(vfp_VNEG,             "VNEG",                    "cccc11101D110001dddd101z01M0mmmm") // VFPv2
-INST(vfp_VSQRT,            "VSQRT",                   "cccc11101D110001dddd101z11M0mmmm") // VFPv2
-INST(vfp_VCVT_f_to_f,      "VCVT (f32<->f64)",        "cccc11101D110111dddd101z11M0mmmm") // VFPv2
-INST(vfp_VCVT_to_float,    "VCVT (to float)",         "cccc11101D111000dddd101zs1M0mmmm") // VFPv2
-INST(vfp_VCVT_to_u32,      "VCVT (to u32)",           "cccc11101D111100dddd101zr1M0mmmm") // VFPv2
-INST(vfp_VCVT_to_s32,      "VCVT (to s32)",           "cccc11101D111101dddd101zr1M0mmmm") // VFPv2
-INST(vfp_VCMP,             "VCMP",                    "cccc11101D110100dddd101zE1M0mmmm") // VFPv2
-INST(vfp_VCMP_zero,        "VCMP (with zero)",        "cccc11101D110101dddd101zE1000000") // VFPv2
-
-// Floating-point system register access
-INST(vfp_VMSR,             "VMSR",                    "cccc111011100001tttt101000010000") // VFPv2
-INST(vfp_VMRS,             "VMRS",                    "cccc111011110001tttt101000010000") // VFPv2
-
-// Extension register load-store instructions
-INST(vfp_VPUSH,            "VPUSH",                   "cccc11010D101101dddd101zvvvvvvvv") // VFPv2
-INST(vfp_VPOP,             "VPOP",                    "cccc11001D111101dddd101zvvvvvvvv") // VFPv2
-INST(vfp_VLDR,             "VLDR",                    "cccc1101UD01nnnndddd101zvvvvvvvv") // VFPv2
-INST(vfp_VSTR,             "VSTR",                    "cccc1101UD00nnnndddd101zvvvvvvvv") // VFPv2
-INST(vfp_VSTM_a1,          "VSTM (A1)",               "cccc110puDw0nnnndddd1011vvvvvvvv") // VFPv2
-INST(vfp_VSTM_a2,          "VSTM (A2)",               "cccc110puDw0nnnndddd1010vvvvvvvv") // VFPv2
-INST(vfp_VLDM_a2,          "VLDM (A2)",               "cccc110puDw1nnnndddd1010vvvvvvvv") // VFPv2
diff --git a/tests/A32/fuzz_arm.cpp b/tests/A32/fuzz_arm.cpp
index c6edfccc..9b0a4d48 100644
--- a/tests/A32/fuzz_arm.cpp
+++ b/tests/A32/fuzz_arm.cpp
@@ -86,12 +86,11 @@ u32 GenRandomInst(u32 pc, bool is_last_inst) {
 #define INST(fn, name, bitstring) {#fn, bitstring},
 #ifdef ARCHITECTURE_Aarch64
 #include "frontend/A32/decoder/arm_a64.inc"
-#include "frontend/A32/decoder/vfp2_a64.inc"
 #else
 #include "frontend/A32/decoder/arm.inc"
 #include "frontend/A32/decoder/asimd.inc"
-#include "frontend/A32/decoder/vfp.inc"
 #endif
+#include "frontend/A32/decoder/vfp.inc"
 #undef INST
         };