MerryMage
b2de47954b
EmitX64: Emit correct cycle count on cond failure
2016-08-18 18:16:18 +01:00
Lioncash
841098a0bc
ir: separate components out a little more
2016-08-17 20:46:21 +01:00
Lioncash
cbd99e4367
jitstate: Use std::array's fill() in ResetRSB
...
Performs the equivalent behavior
2016-08-17 10:10:43 +01:00
Lioncash
74ee92ee38
jitstate: const correctness
...
GetReturnFromRunCodeAddress is const qualified, so this can accept a const
pointer. This also allows for making the constructor accept a const
pointer as well.
2016-08-17 10:10:43 +01:00
Lioncash
439619c827
reg_alloc: Make GetRegLoc return by const reference
...
Considering a HostLocInfo instance houses a std::vector, every time this
function is called can cause a potential heap allocation.
This can be somewhat unnecessary because this function is only used to query
for information we already have.
Considering this is used by several other internal query functions such as
IsRegisterOccupied, IsRegisterAllocated, and IsLastUse, this will result
in better codegen (returning an address is just 3 instructions excluding
the ret instruction for returning, meanwhile heap alloc can be 60+).
This also renames the function to have the same name as its non-const
counterpart, since overloading will just select the correct function
instead of putting that onus on the developer.
2016-08-17 10:08:08 +01:00
MerryMage
0ebb572e2d
Optimization: Make RSB a ring buffer instead of a stack
2016-08-15 15:48:22 +01:00
MerryMage
7d7ac0af71
Optimization: Make SVC use RSB
2016-08-15 15:02:08 +01:00
MerryMage
6c45619aa1
Optimization: Implement terminal LinkBlockFast
2016-08-15 14:33:17 +01:00
MerryMage
624e84fa09
Optimization: Tweak RSB
2016-08-15 14:08:06 +01:00
MerryMage
070298b948
Optimization: bugfix! Return Stack Buffer location hash calculation was incorrect
2016-08-15 13:21:58 +01:00
MerryMage
e164ede4dc
TranslateArm: Implement MRS, MSR (imm), MSR (reg)
2016-08-15 11:50:49 +01:00
MerryMage
8fc21f481a
RegAlloc: Handle case when def is unused
2016-08-13 01:55:03 +01:00
MerryMage
d43d97b990
EmitX64/EmitPushRSB: Assert that patch location is of correct size
2016-08-13 00:52:31 +01:00
MerryMage
960d14d18e
Optimization: Implement Return Stack Buffer
2016-08-13 00:10:23 +01:00
bunnei
8e68e6fdd9
TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.
2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032
TranslateArm: Implement QADD8 and UQADD8.
2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb
TranslateArm: Implement QSUB8.
2016-08-12 19:00:44 +01:00
bunnei
86fe29c6d2
TranslateArm: Implement UQSUB8.
2016-08-12 19:00:44 +01:00
MerryMage
1029fd27ce
Update documentation (2016-08-12)
2016-08-12 18:17:31 +01:00
MerryMage
df39308e03
TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB
2016-08-09 22:57:20 +01:00
MerryMage
29d30bf931
Interface: Added Jit::Reset to reset CPU state
2016-08-09 22:45:54 +01:00
Tillmann Karras
5d26899ac9
Add simplified LogicalShiftRight64 IR opcode
2016-08-08 22:27:05 +01:00
Tillmann Karras
ccb2aa96a5
Add support for the APSR.Q flag
2016-08-08 22:27:04 +01:00
MerryMage
975f011fc0
BackendX64/RegAlloc: Do not allocate RSP for guest use
2016-08-08 16:01:07 +01:00
MerryMage
abd113f160
EmitX64: Renamed patch_jmp_locations to patch_jg_locations
2016-08-08 15:56:07 +01:00
MerryMage
52fa998e6b
EmitX64: EmitTerminalLinkBlock: Fix behaviour when setting T and E flags
2016-08-07 22:47:43 +01:00
MerryMage
04c1a0d2de
EmitX64: Switch MXCSR when switching to interpreter
2016-08-07 22:47:17 +01:00
MerryMage
a32063fa60
EmitX64: Implement block linking
2016-08-07 22:11:39 +01:00
MerryMage
328422b740
RegAlloc: HostCall flushes all XMM regsiters
2016-08-07 21:02:16 +01:00
MerryMage
a2c2db277b
VFP: Implement VMOV (all variants)
2016-08-07 19:25:12 +01:00
MerryMage
aba705f6b9
BackendX64: Merge Routines into BlockOfCode
2016-08-07 18:08:48 +01:00
MerryMage
0f412247ed
VFP: Implement VSQRT
2016-08-07 12:19:07 +01:00
MerryMage
3f1345a1a5
VFP: Implement VNMUL, VDIV
2016-08-07 10:56:12 +01:00
MerryMage
12e7f2c359
VFP: Implement VMUL
2016-08-07 10:21:14 +01:00
MerryMage
97b5fa173f
VFP: Implement VSUB
2016-08-07 01:45:52 +01:00
MerryMage
ce6b5f8210
VFP: Implement VABS
2016-08-07 01:27:18 +01:00
MerryMage
f88b1b4c2e
FPSCR: Save and restore MSCSR across supervisor call, fix MXCSR exception mask
2016-08-07 01:10:19 +01:00
Tillmann Karras
9264e2e04c
Use XOR when loading a zero immediate
2016-08-06 21:17:11 +01:00
Tillmann Karras
846d07d7b5
Add Sub64 opcode
2016-08-06 21:17:11 +01:00
Tillmann Karras
b9f4f1ed0f
Add carry support to MostSignificantWord
2016-08-06 21:17:11 +01:00
MerryMage
411e804b0d
Interface: Forward declare Arm::LocationDescriptor
2016-08-06 20:11:35 +01:00
MerryMage
4b31ea25a7
VFP: Implement VADD.{F32,F64}
2016-08-06 20:03:15 +01:00
MerryMage
94d5738f62
BackendX64/Routines: Add floating-point constants
2016-08-06 20:01:47 +01:00
MerryMage
8754728a82
BackendX64/RegAlloc: Corrected code emitted by EmitMove for XMM->Spill case
2016-08-06 20:01:47 +01:00
MerryMage
8cc4fe8a10
BackendX64/RegAlloc: HostLocToX64 now handles XMM registers properly
2016-08-06 20:01:47 +01:00
MerryMage
856298577d
EmitX64: Don't give MOVSX or MOVZX an immediate oparg
2016-08-06 01:03:39 +01:00
MerryMage
640ce48baa
VFP: Implement {Get,Set}ExtendedRegister{32,64}
2016-08-05 19:06:10 +01:00
MerryMage
4c0a85f3b3
EmitX64: Correct EmitPack2x32To1x64 implementation
2016-08-05 18:43:24 +01:00
MerryMage
742eeb8913
BackendX64/RegAlloc: Correct debugging asserts and correct UseDef behaviour for spill locations
2016-08-05 18:43:22 +01:00
MerryMage
d80dcc5367
BackendX64/EmitX64: Eliminate unnecessary MOVs in Add64, Mul, Mul64, SignExtendWordToLong, ZeroExtendWordToLong, Pack2x32To1x64
2016-08-05 15:27:29 +01:00
