MerryMage
4df6c424df
Forward declare IR::Opcode and IR::Type where possible
2018-02-11 11:52:44 +00:00
MerryMage
2e14326fd5
assert: Use fmt in ASSERT_MSG
2018-01-28 00:00:58 +00:00
Lioncash
8c013e7928
General: Convert multiple namespace specifiers to nested namespace specifiers where applicable
...
Makes namespacing a little less noisy
2018-01-26 17:06:48 +00:00
MerryMage
9fc1570788
IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128
...
ARM's Architecture Specification Language doesn't distinguish between floats and integers
as much as we do. This makes some things difficult to implement. Since our register
allocator is now capable of allocating values to XMMs and GPRs as necessary, the
Transfer IR instructions are no longer necessary as they used to be and they can be
removed.
2018-01-19 01:09:46 +00:00
MerryMage
2f84137f5b
IR: Implement Conditional Select
2018-01-18 11:36:52 +00:00
MerryMage
8a8dcad250
A64: Implement addsub instructions
2018-01-09 18:57:06 +00:00
MerryMage
1431cedcaa
A64: Implement ADD_shifted
2018-01-09 18:57:06 +00:00
MerryMage
557fe60164
A64: Initial framework
2018-01-09 18:57:06 +00:00
MerryMage
512dae0361
IR: Compile-time type-checking of IR
2018-01-09 18:20:57 +00:00
MerryMage
b88b7ecbbf
IR/Value: Rename RegRef and ExtRegRef to A32Reg and A32ExtReg
2018-01-09 18:20:57 +00:00
MerryMage
42c83fadce
IR: Split off A32 specific opcodes
2018-01-09 18:20:57 +00:00
MerryMage
d8a37e287c
IR: Add IR type CoprocInfo
2017-01-08 14:56:06 +00:00
MerryMage
192a0029be
ir/opcodes: Implement IR::AreTypesCompatible
...
Type-checking is now occuring in more than one place.
2016-08-19 01:34:14 +01:00
Tillmann Karras
9782e7da3f
verification_pass: show type errors
2016-08-19 01:17:30 +01:00
MerryMage
1029fd27ce
Update documentation (2016-08-12)
2016-08-12 18:17:31 +01:00
MerryMage
d743adf518
Reorganisation, Import Skyeye, This is a mess
2016-07-04 17:22:11 +08:00
