Citra-emu/dynarmic-android
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  • 5c9179e2db backend/a64: Port reg_alloc SachinVin 2019-08-03 10:28:27 +05:30
  • a37f9c4cc6 backend/a64: Port ABI functions SachinVin 2019-08-03 10:27:02 +05:30
  • ab07872025 backend/a64: Port perfmap SachinVin 2019-08-03 10:26:00 +05:30
  • be80e558c9 backend/a64: Port hostloc SachinVin 2019-08-03 10:24:35 +05:30
  • 9ca0155c19 backend/a64: Devirtualize functions for a64 SachinVin 2019-08-03 10:23:46 +05:30
  • fbb03a2a1b backend/a64: Port block_range_info SachinVin 2019-07-16 17:30:05 +05:30
  • 19b7fba235 CMakeModules\DetectArchitecture.cmake: Refactor ARCHITECTURE to DYNARMIC_ARCHITECTURE SachinVin 2019-07-20 08:41:42 +05:30
  • 9bcbdacd2b [HACK] A32/exception_generating: Interpret undefined instructions SachinVin 2019-07-18 16:47:11 +01:00
  • c72550f7d9 [HACK] CMakeLists: Do not build A64 tests on AArch64 SachinVin 2019-07-18 16:42:10 +01:00
  • 8fdeb84822 fuzz_thumb: Add [JitA64] tag to supported instructions MerryMage 2019-07-18 16:46:36 +01:00
  • 4e4f2b8ef0 backend/A64: Port a32_jitstate SachinVin 2019-07-18 16:45:58 +01:00
  • 8de86b391f code_block: Support Windows and fix munmap check MerryMage 2019-07-18 16:44:51 +01:00
  • 0a55e1b11e ir_opt: Port a32_merge_interpreter_blocks SachinVin 2019-07-18 16:43:58 +01:00
  • f654dbb29b assert: Use __android_log_print on Android SachinVin 2019-07-18 16:40:27 +01:00
  • 668d20391a CMakeLists: xbyak should only be linked on x64 SachinVin 2019-07-18 16:39:14 +01:00
  • 0ce4fa4480 a64_emitter: Fix ABI push and pop SachinVin 2019-07-18 16:32:50 +01:00
  • ddc8b7f932 a64_emitter: More style cleanup SachinVin 2019-07-18 16:32:17 +01:00
  • 6010c48bd0 a64_emitter: Style cleanup SachinVin 2019-07-18 16:31:05 +01:00
  • b8369d77ac Backend/A64: add jitstate_info.h BreadFish64 2018-08-27 15:28:25 -05:00
  • 7905eeb94b Backend/A64: Add Dolphin's ARM emitter BreadFish64 2018-08-16 16:16:23 -05:00
  • f7664d9161 Add aarch64 CI BreadFish64 2018-08-17 10:54:40 -05:00
  • b0c3701629 tests/A32: remove unused function aarch64-backend-wip SachinVin 2020-05-23 16:00:02 +05:30
  • 659d78c9c4 A32: Implement ASIMD VSWP Lioncash 2020-05-21 18:36:47 -04:00
  • d0d50c4824 print_info: Use VFP and ASIMD decoders to get dynarmic name for instruction MerryMage 2020-05-17 22:40:20 +01:00
  • d0075f4ea6 print_info: Use LLVM to disassemble A32 MerryMage 2020-05-17 22:30:46 +01:00
  • c59a127e86 opcodes: Switch from std::map to std::array MerryMage 2020-05-17 17:00:18 +01:00
  • d0b45f6150 A32: Implement ARMv8 VST{1-4} (multiple) MerryMage 2020-05-17 16:59:56 +01:00
  • 562eab9b3c backend/A64:port single stepping fix SachinVin 2020-05-17 20:39:50 +05:30
  • 7cfe573f0d Merge branch 'travis-a64' into aarch64-backend-wip SachinVin 2020-05-17 09:42:15 +05:30
  • eb332b3836 asimd_three_same: Unify BitwiseInstructionWithDst with BitwiseInstruction Lioncash 2020-05-16 13:36:02 -04:00
  • f42b3ad4a0 A32: Implement ASIMD VBIF (register) Lioncash 2020-05-16 13:30:13 -04:00
  • ee9a81dcba A32: Implement ASIMD VBIT (register) Lioncash 2020-05-16 13:27:39 -04:00
  • d624059ead A32: Implement ASIMD VBSL (register) Lioncash 2020-05-16 13:24:18 -04:00
  • 66663cf8e7 asimd_three_same: Collapse all bitwise implementations into a single code path Lioncash 2020-05-16 13:17:42 -04:00
  • 4b5e3437cf A32: Implement ASIMD VEOR (register) Lioncash 2020-05-16 13:03:40 -04:00
  • 67b284f6fa A32: Implement ASIMD VORN (register) Lioncash 2020-05-16 13:00:32 -04:00
  • 1fdd90ca2a A32: Implement ASIMD VORR (register) Lioncash 2020-05-16 12:57:43 -04:00
  • 9b93a9de46 a32_jitstate: Remove obsoleted debug assert Lioncash 2020-05-16 12:55:02 -04:00
  • 64fa804dd4 A32: Implement ASIMD VBIC (register) Lioncash 2020-05-16 12:40:12 -04:00
  • 0441ab81a1 A32: Implement ASIMD VAND (register) Lioncash 2020-05-16 11:31:17 -04:00
  • 20545ba582 travis : a64: remove docker; dont fuzz against unicorn travis-a64 SachinVin 2020-05-16 23:33:24 +05:30
  • 30962b284b backend/A64: Use ASSERT_FALSE where possible SachinVin 2020-05-16 23:34:32 +05:30
  • 1b25e867ae asimd_load_store_structures: Simplify ToExtRegD() Lioncash 2020-05-16 11:26:02 -04:00
  • 2169653c50 a64_emit_x64: Invalid regalloc code for EmitA64ExclusiveReadMemory128 MerryMage 2020-05-16 12:31:12 +01:00
  • 1a0bc5ba91 A32/ASIMD: ARMv8: Implement VLD{1-4} (multiple) MerryMage 2020-05-16 12:30:09 +01:00
  • 1183994897 backend\A64\block_of_code.cpp: Remove stray semicolon SachinVin 2020-05-16 18:38:31 +05:30
  • 2a209226f9 backend\A64\reg_alloc.cpp: Fix assert aarch64-backend SachinVin 2020-05-16 18:18:29 +05:30
  • c2a877611c CmakeLists: DYNARMIC_FRONTENDS optin for A64 backend SachinVin 2020-05-16 18:17:56 +05:30
  • bdf484be62 frontend/A32: remove decoder hack vfp instructions SachinVin 2020-04-25 19:14:33 +05:30
  • 6a41c5d0ef a64_emiter: CountLeadingZeros intrinsic shortcuts SachinVin 2020-04-24 21:23:38 +05:30
  • 2c94eea72e emit_a64: get rid of useless NOP generation BreadFish64 2020-04-20 15:11:25 -05:00
  • 0885ffdc50 emit_a64: Do not clear fast_dispatch_table unnecessarily SachinVin 2020-04-18 14:28:21 +05:30
  • fe229b4a8e backend/A64/block_of_code.cpp: Clean up C style casts SachinVin 2020-04-18 14:19:01 +05:30
  • 4c27fb78a8 backend/A64/a32_emit_a64.cpp: EmitA32{Get,Set}Fpscr, set the guest_fpcr to host fpcr SachinVin 2020-04-14 21:49:29 +05:30
  • b07864321e backend/A64: Add Step SachinVin 2020-04-07 22:11:16 +05:30
  • 6f95f6d311 backend/A64/block_of_code: Always specify codeptr to run from SachinVin 2020-04-07 22:07:36 +05:30
  • 7d7b8edf31 backend/A64: fix mp BreadFish64 2020-04-07 22:58:14 -05:00
  • 0b81c5a3c1 backend/A64: Move SP to FP in GenMemoryAccessors + Minor cleanup and SachinVin 2020-03-28 23:26:21 +05:30
  • 941a6ba808 backend/A64: Use X26 for storing remaining cycles. SachinVin 2019-12-14 18:15:02 +05:30
  • eeb7c609fc backend/A64: add fastmem support BreadFish64 2019-10-25 21:07:19 -05:00
  • c4b62bb22e merge fastmem BreadFish64 2019-10-17 13:50:31 -05:00
  • 2d7f2b11b2 backend\A64\constant_pool.cpp: Correct offset calculation SachinVin 2020-02-16 20:36:00 +05:30
  • 6a3c3579d1 backend/A64/a32_jitstate: Upstream changes from x64 backend SachinVin 2020-01-19 18:04:34 +05:30
  • 3db06be313 backend/A64: Add test for q flag being incorrectly set SachinVin 2020-02-08 18:46:35 +05:30
  • d3e5bd4b43 backend/A64/a32_emit_a64.cpp: Use unused HostCall registers SachinVin 2020-01-16 19:47:26 +05:30
  • 5aa7b3cbed backend/A64/a32_emit_a64.cpp: Use MOVP2R instead of MOVI2R. SachinVin 2019-12-14 13:21:31 +05:30
  • 8fd3c5c4f3 backend/A64/abi: Fix FP caller and callee save registers SachinVin 2019-11-23 17:32:06 +05:30
  • 0f22688948 a64/block_of_code: use GetWritableCodePtr() instead of const_cast<...>(GetCodePtr()) SachinVin 2019-11-23 17:29:28 +05:30
  • 58450e7b42 backend/A64/constant_pool: Clean up unused stuff SachinVin 2019-11-23 17:23:54 +05:30
  • c3dab59e46 emit_a64_data_processing.cpp: remove pointless DoNZCV. SachinVin 2019-11-03 12:09:01 +05:30
  • 351a557618 IR + backend/*: add SetCpsrNZCVRaw and change arg1 type of SetCpsrNZCV to IR::NZCV SachinVin 2019-11-03 08:52:09 +05:30
  • 75ed09b939 backend/A64: Fix ASR impl SachinVin 2019-11-02 19:46:22 +05:30
  • fd4a8f277d a64_emitter: Use Correct alias for ZR and WZR in CMP SachinVin 2019-10-08 17:03:40 +05:30
  • 722e76f75f backend/A64: Use CSLE instead of branches for LSL LSR and ASR + minor cleanup SachinVin 2019-10-08 12:52:45 +05:30
  • 40463bde01 backend/A64: Use correct register size for EmitNot64 SachinVin 2019-10-06 11:20:25 +05:30
  • 203e8326fc tests/A32: Check if Q flag is cleared properly SachinVin 2019-10-06 11:22:25 +05:30
  • 5a54320fea backend/A64: SignedSaturatedSub and SignedSaturatedAdd SachinVin 2019-10-06 11:18:34 +05:30
  • 571d3c49c9 backend/A64/emit_a64_saturation.cpp: Implement EmitSignedSaturation and EmitUnsignedSaturation SachinVin 2019-09-28 18:14:44 +05:30
  • d61d21593f backend/A64: add emit_a64_saturation.cpp SachinVin 2019-09-21 18:04:46 +05:30
  • 1a295642fb backend/A64: Fix EmitA32SetCpsr SachinVin 2019-09-21 17:51:19 +05:30
  • 631274453a backend/A64/devirtualize: remove unused DevirtualizeItanium SachinVin 2019-08-18 08:50:37 +05:30
  • d815a9bd08 backend/A64: refactor to fpscr from mxcsr SachinVin 2019-08-17 18:28:41 +05:30
  • e06008a530 backend/A64: Use ScratchGpr() instead of ABI_SCRATCH1 where possible SachinVin 2019-08-17 18:27:03 +05:30
  • 3c30758dca backend/A64: support for always_little_endian SachinVin 2019-08-04 15:15:39 +05:30
  • 1a32b5501c backend/a64: Add hook_hint_instructions option SachinVin 2019-08-03 12:32:07 +05:30
  • 0d05eeb90a backend /A64: cleanup SachinVin 2019-07-31 22:43:42 +05:30
  • 14b94212a8 gitignore: add .vs dir SachinVin 2019-07-28 21:15:38 +05:30
  • 6faf2816bc Minor style fix SachinVin 2019-07-28 21:13:27 +05:30
  • e45461ef9f backend\A64\emit_a64_packed.cpp: Implement AddSub halving and non halving SachinVin 2019-07-27 17:34:49 +05:30
  • 4880a6cfa7 backend\A64: Instructions that got implemented on the way SachinVin 2019-07-27 17:36:44 +05:30
  • 04a59768c6 backend\A64\emit_a64_packed.cpp: Implement Unsigned Sum of Absolute Differences SachinVin 2019-07-27 17:16:00 +05:30
  • 6ba3bbf7d4 a64 emitter: Absolute Difference and add across vector instructions SachinVin 2019-07-27 17:14:53 +05:30
  • 8216b2f7aa backend\A64\emit_a64_packed.cpp: Implement Packed Select SachinVin 2019-07-27 13:33:54 +05:30
  • f889ecaf4d Backend/a64: Fix asset when falling back to interpreter SachinVin 2019-07-25 03:30:22 +00:00
  • 340e772c1f backend\A64\emit_a64_packed.cpp: Implement Packed Halving Add/Sub instructions SachinVin 2019-07-27 09:54:48 +05:30
  • 9e0a3e7aa0 backend\A64\emit_a64_packed.cpp: Implement Packed Saturating instructions SachinVin 2019-07-27 09:49:19 +05:30
  • 79157ef109 backend\A64\emit_a64_packed.cpp: Implement SignedPacked*- ADD and SUB SachinVin 2019-07-27 09:46:27 +05:30
  • 3ed0a9a593 a64 emitter: Vector Halving and Saturation instructions SachinVin 2019-07-27 10:03:06 +05:30
  • 42d5e1bc0e backend\A64\emit_a64_packed.cpp: Implement UnsignedPacked*- ADD and SUB... SachinVin 2019-07-22 22:28:31 +05:30
  • c78aa47c00 a64 emitter: fix Scalar Saturating Instructions SachinVin 2019-07-27 09:56:24 +05:30