324 lines
8.0 KiB
C++
324 lines
8.0 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic::A64 {
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bool TranslatorVisitor::ADD_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u64 imm;
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switch (shift.ZeroExtend()) {
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case 0b00:
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imm = imm12.ZeroExtend<u64>();
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break;
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case 0b01:
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imm = imm12.ZeroExtend<u64>() << 12;
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break;
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default:
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return ReservedValue();
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}
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto result = ir.Add(operand1, I(datasize, imm));
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if (Rd == Reg::SP) {
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SP(datasize, result);
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} else {
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X(datasize, Rd, result);
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}
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return true;
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}
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bool TranslatorVisitor::ADDS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u64 imm;
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switch (shift.ZeroExtend()) {
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case 0b00:
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imm = imm12.ZeroExtend<u64>();
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break;
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case 0b01:
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imm = imm12.ZeroExtend<u64>() << 12;
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break;
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default:
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return ReservedValue();
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}
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto result = ir.Add(operand1, I(datasize, imm));
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SUB_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u64 imm;
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switch (shift.ZeroExtend()) {
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case 0b00:
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imm = imm12.ZeroExtend<u64>();
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break;
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case 0b01:
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imm = imm12.ZeroExtend<u64>() << 12;
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break;
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default:
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return ReservedValue();
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}
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto result = ir.Sub(operand1, I(datasize, imm));
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if (Rd == Reg::SP) {
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SP(datasize, result);
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} else {
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X(datasize, Rd, result);
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}
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return true;
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}
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bool TranslatorVisitor::SUBS_imm(bool sf, Imm<2> shift, Imm<12> imm12, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u64 imm;
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switch (shift.ZeroExtend()) {
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case 0b00:
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imm = imm12.ZeroExtend<u64>();
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break;
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case 0b01:
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imm = imm12.ZeroExtend<u64>() << 12;
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break;
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default:
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return ReservedValue();
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}
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto result = ir.Sub(operand1, I(datasize, imm));
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::ADD_shift(bool sf, Imm<2> shift, Reg Rm, Imm<6> imm6, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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if (shift == 0b11) return ReservedValue();
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if (!sf && imm6.Bit<5>()) return ReservedValue();
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u8 shift_amount = imm6.ZeroExtend<u8>();
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auto operand1 = X(datasize, Rn);
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auto operand2 = ShiftReg(datasize, Rm, shift, ir.Imm8(shift_amount));
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auto result = ir.Add(operand1, operand2);
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::ADDS_shift(bool sf, Imm<2> shift, Reg Rm, Imm<6> imm6, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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if (shift == 0b11) return ReservedValue();
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if (!sf && imm6.Bit<5>()) return ReservedValue();
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u8 shift_amount = imm6.ZeroExtend<u8>();
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auto operand1 = X(datasize, Rn);
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auto operand2 = ShiftReg(datasize, Rm, shift, ir.Imm8(shift_amount));
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auto result = ir.Add(operand1, operand2);
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SUB_shift(bool sf, Imm<2> shift, Reg Rm, Imm<6> imm6, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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if (shift == 0b11) return ReservedValue();
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if (!sf && imm6.Bit<5>()) return ReservedValue();
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u8 shift_amount = imm6.ZeroExtend<u8>();
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auto operand1 = X(datasize, Rn);
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auto operand2 = ShiftReg(datasize, Rm, shift, ir.Imm8(shift_amount));
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auto result = ir.Sub(operand1, operand2);
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SUBS_shift(bool sf, Imm<2> shift, Reg Rm, Imm<6> imm6, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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if (shift == 0b11) return ReservedValue();
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if (!sf && imm6.Bit<5>()) return ReservedValue();
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u8 shift_amount = imm6.ZeroExtend<u8>();
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auto operand1 = X(datasize, Rn);
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auto operand2 = ShiftReg(datasize, Rm, shift, ir.Imm8(shift_amount));
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auto result = ir.Sub(operand1, operand2);
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::ADD_ext(bool sf, Reg Rm, Imm<3> option, Imm<3> imm3, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u8 shift = imm3.ZeroExtend<u8>();
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if (shift > 4) return ReservedValue();
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto operand2 = ExtendReg(datasize, Rm, option, shift);
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auto result = ir.Add(operand1, operand2);
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if (Rd == Reg::SP) {
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SP(datasize, result);
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} else {
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X(datasize, Rd, result);
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}
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return true;
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}
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bool TranslatorVisitor::ADDS_ext(bool sf, Reg Rm, Imm<3> option, Imm<3> imm3, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u8 shift = imm3.ZeroExtend<u8>();
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if (shift > 4) return ReservedValue();
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto operand2 = ExtendReg(datasize, Rm, option, shift);
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auto result = ir.Add(operand1, operand2);
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SUB_ext(bool sf, Reg Rm, Imm<3> option, Imm<3> imm3, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u8 shift = imm3.ZeroExtend<u8>();
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if (shift > 4) return ReservedValue();
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto operand2 = ExtendReg(datasize, Rm, option, shift);
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auto result = ir.Sub(operand1, operand2);
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if (Rd == Reg::SP) {
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SP(datasize, result);
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} else {
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X(datasize, Rd, result);
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}
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return true;
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}
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bool TranslatorVisitor::SUBS_ext(bool sf, Reg Rm, Imm<3> option, Imm<3> imm3, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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u8 shift = imm3.ZeroExtend<u8>();
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if (shift > 4) return ReservedValue();
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auto operand1 = Rn == Reg::SP ? SP(datasize) : IR::U32U64(X(datasize, Rn));
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auto operand2 = ExtendReg(datasize, Rm, option, shift);
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auto result = ir.Sub(operand1, operand2);
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::ADC(bool sf, Reg Rm, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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IR::U32U64 operand1 = X(datasize, Rn);
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IR::U32U64 operand2 = X(datasize, Rm);
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auto result = ir.AddWithCarry(operand1, operand2, ir.GetCFlag());
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::ADCS(bool sf, Reg Rm, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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IR::U32U64 operand1 = X(datasize, Rn);
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IR::U32U64 operand2 = X(datasize, Rm);
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auto result = ir.AddWithCarry(operand1, operand2, ir.GetCFlag());
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SBC(bool sf, Reg Rm, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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IR::U32U64 operand1 = X(datasize, Rn);
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IR::U32U64 operand2 = X(datasize, Rm);
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auto result = ir.SubWithCarry(operand1, operand2, ir.GetCFlag());
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X(datasize, Rd, result);
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return true;
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}
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bool TranslatorVisitor::SBCS(bool sf, Reg Rm, Reg Rn, Reg Rd) {
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size_t datasize = sf ? 64 : 32;
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IR::U32U64 operand1 = X(datasize, Rn);
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IR::U32U64 operand2 = X(datasize, Rm);
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auto result = ir.SubWithCarry(operand1, operand2, ir.GetCFlag());
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ir.SetNZCV(ir.NZCVFrom(result));
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X(datasize, Rd, result);
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return true;
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}
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} // namespace Dynarmic::A64
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