From 366d63f4b45d8369a6eddbe38d5dc5182805cb62 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 5 May 2019 19:40:14 +0100 Subject: [PATCH] a32_jitstate: Enable SSE FTZ and DAZ --- src/backend/x64/a32_jitstate.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/backend/x64/a32_jitstate.cpp b/src/backend/x64/a32_jitstate.cpp index aac8c8f4..f7e1b288 100644 --- a/src/backend/x64/a32_jitstate.cpp +++ b/src/backend/x64/a32_jitstate.cpp @@ -189,8 +189,8 @@ void A32JitState::SetFpscr(u32 FPSCR) { if (Common::Bit<24>(FPSCR)) { // VFP Flush to Zero - //guest_MXCSR |= (1 << 15); // SSE Flush to Zero - //guest_MXCSR |= (1 << 6); // SSE Denormals are Zero + guest_MXCSR |= (1 << 15); // SSE Flush to Zero + guest_MXCSR |= (1 << 6); // SSE Denormals are Zero } }