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Add edge case for FCMP with 0 immediate. (#8)

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* Add edge case for FCMP with 0 immediate.

* Update emit_a64_floating_point.cpp
This commit is contained in:
PabloMK7 2022-10-27 08:20:48 +02:00 committed by SachinVin
parent 8691f52aaa
commit 571c73a8f3
1 changed files with 24 additions and 8 deletions
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32
src/dynarmic/backend/A64/emit_a64_floating_point.cpp
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@ -183,13 +183,21 @@ static ARM64Reg SetFpscrNzcvFromFlags(BlockOfCode& code, EmitContext& ctx) {
void EmitA64::EmitFPCompare32(EmitContext& ctx, IR::Inst* inst) { void EmitA64::EmitFPCompare32(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ARM64Reg reg_a = EncodeRegToSingle(ctx.reg_alloc.UseFpr(args[0])); ARM64Reg reg_a = EncodeRegToSingle(ctx.reg_alloc.UseFpr(args[0]));
ARM64Reg reg_b = EncodeRegToSingle(ctx.reg_alloc.UseFpr(args[1]));
bool exc_on_qnan = args[2].GetImmediateU1(); bool exc_on_qnan = args[2].GetImmediateU1();
if (exc_on_qnan) { if (args[1].IsImmediate() && args[1].GetImmediateU64() == 0) {
code.fp_emitter.FCMPE(reg_a, reg_b); if (exc_on_qnan) {
code.fp_emitter.FCMPE(reg_a);
} else {
code.fp_emitter.FCMP(reg_a);
}
} else { } else {
code.fp_emitter.FCMP(reg_a, reg_b); ARM64Reg reg_b = EncodeRegToSingle(ctx.reg_alloc.UseFpr(args[1]));
if (exc_on_qnan) {
code.fp_emitter.FCMPE(reg_a, reg_b);
} else {
code.fp_emitter.FCMP(reg_a, reg_b);
}
} }
ARM64Reg nzcv = SetFpscrNzcvFromFlags(code, ctx); ARM64Reg nzcv = SetFpscrNzcvFromFlags(code, ctx);
@ -199,13 +207,21 @@ void EmitA64::EmitFPCompare32(EmitContext& ctx, IR::Inst* inst) {
void EmitA64::EmitFPCompare64(EmitContext& ctx, IR::Inst* inst) { void EmitA64::EmitFPCompare64(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const ARM64Reg reg_a = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[0])); const ARM64Reg reg_a = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[0]));
const ARM64Reg reg_b = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[1]));
bool exc_on_qnan = args[2].GetImmediateU1(); bool exc_on_qnan = args[2].GetImmediateU1();
if (exc_on_qnan) { if (args[1].IsImmediate() && args[1].GetImmediateU64() == 0) {
code.fp_emitter.FCMPE(reg_a, reg_b); if (exc_on_qnan) {
code.fp_emitter.FCMPE(reg_a);
} else {
code.fp_emitter.FCMP(reg_a);
}
} else { } else {
code.fp_emitter.FCMP(reg_a, reg_b); const ARM64Reg reg_b = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[1]));
if (exc_on_qnan) {
code.fp_emitter.FCMPE(reg_a, reg_b);
} else {
code.fp_emitter.FCMP(reg_a, reg_b);
}
} }
ARM64Reg nzcv = SetFpscrNzcvFromFlags(code, ctx); ARM64Reg nzcv = SetFpscrNzcvFromFlags(code, ctx);