a64 emitter: Absolute Difference and add across vector instructions
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@ -2841,6 +2841,10 @@ void ARM64FloatEmitter::ADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm)
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ASSERT(!(IsDouble(Rd) && esize == D));
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EmitThreeSame(0, static_cast<u32>(esize), 0b10000, Rd, Rn, Rm);
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}
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void ARM64FloatEmitter::ADDV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
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ASSERT(esize != D);
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Emit2RegMisc(IsQuad(Rd), 0, static_cast<u32>(esize), 0b100011011, Rd, Rn);
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}
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void ARM64FloatEmitter::SUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
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ASSERT(!(IsDouble(Rd) && esize == D));
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EmitThreeSame(1, static_cast<u32>(esize), 0b10000, Rd, Rn, Rm);
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@ -2956,6 +2960,22 @@ void ARM64FloatEmitter::REV32(u8 size, ARM64Reg Rd, ARM64Reg Rn) {
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void ARM64FloatEmitter::REV64(u8 size, ARM64Reg Rd, ARM64Reg Rn) {
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Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn);
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}
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void ARM64FloatEmitter::SABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
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ASSERT(esize != D);
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EmitThreeSame(0, static_cast<u32>(esize), 0b01110, Rd, Rn, Rm);
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}
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void ARM64FloatEmitter::UABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
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ASSERT(esize != D);
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EmitThreeSame(1, static_cast<u32>(esize), 0b01110, Rd, Rn, Rm);
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}
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void ARM64FloatEmitter::SADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
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ASSERT(esize != D);
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Emit2RegMisc(IsQuad(Rd), 0, static_cast<u32>(esize), 0b100000011, Rd, Rn);
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}
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void ARM64FloatEmitter::UADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn) {
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ASSERT(esize != D);
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Emit2RegMisc(IsQuad(Rd), 1, static_cast<u32>(esize), 0b100000011, Rd, Rn);
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}
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void ARM64FloatEmitter::SHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm) {
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ASSERT(!(IsDouble(Rd) && esize == D));
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EmitThreeSame(0, static_cast<u32>(esize), 0b0, Rd, Rn, Rm);
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@ -964,6 +964,7 @@ public:
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// Vector
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void ADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void ADDV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
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void SUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void AND(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void BSL(ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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@ -999,6 +1000,10 @@ public:
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void REV16(u8 size, ARM64Reg Rd, ARM64Reg Rn);
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void REV32(u8 size, ARM64Reg Rd, ARM64Reg Rn);
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void REV64(u8 size, ARM64Reg Rd, ARM64Reg Rn);
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void SABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void UABD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void SADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
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void UADDLV(ESize esize, ARM64Reg Rd, ARM64Reg Rn);
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void SHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void UHADD(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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void SHSUB(ESize esize, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm);
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