From 7a926d689bcc1cc39dd26d5bba379dffcc6815a3 Mon Sep 17 00:00:00 2001 From: SachinVin Date: Sun, 20 Nov 2022 22:42:00 +0530 Subject: [PATCH] backend/A64: Rename PackedAbsDiffSumS8 to PackedAbsDiffSumU8 --- src/dynarmic/backend/A64/emit_a64_packed.cpp | 2 +- src/dynarmic/backend/A64/opcodes.inc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dynarmic/backend/A64/emit_a64_packed.cpp b/src/dynarmic/backend/A64/emit_a64_packed.cpp index 393f25ac..f33c5a20 100644 --- a/src/dynarmic/backend/A64/emit_a64_packed.cpp +++ b/src/dynarmic/backend/A64/emit_a64_packed.cpp @@ -443,7 +443,7 @@ void EmitA64::EmitPackedSaturatedSubS16(EmitContext& ctx, IR::Inst* inst) { ctx.reg_alloc.DefineValue(inst, a); } -void EmitA64::EmitPackedAbsDiffSumS8(EmitContext& ctx, IR::Inst* inst) { +void EmitA64::EmitPackedAbsDiffSumU8(EmitContext& ctx, IR::Inst* inst) { auto args = ctx.reg_alloc.GetArgumentInfo(inst); const ARM64Reg a = EncodeRegToDouble(ctx.reg_alloc.UseScratchFpr(args[0])); diff --git a/src/dynarmic/backend/A64/opcodes.inc b/src/dynarmic/backend/A64/opcodes.inc index ccb1f246..99c93835 100644 --- a/src/dynarmic/backend/A64/opcodes.inc +++ b/src/dynarmic/backend/A64/opcodes.inc @@ -249,7 +249,7 @@ OPCODE(PackedSaturatedAddU16, U32, U32, OPCODE(PackedSaturatedAddS16, U32, U32, U32 ) OPCODE(PackedSaturatedSubU16, U32, U32, U32 ) OPCODE(PackedSaturatedSubS16, U32, U32, U32 ) -OPCODE(PackedAbsDiffSumS8, U32, U32, U32 ) +OPCODE(PackedAbsDiffSumU8, U32, U32, U32 ) OPCODE(PackedSelect, U32, U32, U32, U32 ) // CRC instructions