diff --git a/src/frontend/A32/decoder/thumb32.inc b/src/frontend/A32/decoder/thumb32.inc
index 8dd232a5..c5421c69 100644
--- a/src/frontend/A32/decoder/thumb32.inc
+++ b/src/frontend/A32/decoder/thumb32.inc
@@ -287,7 +287,7 @@ INST(thumb32_SMLAL,          "SMLAL",                    "111110111100nnnnllllhh
 //INST(thumb32_SMLALXY,        "SMLALXY",                  "111110111100------------10------")
 //INST(thumb32_SMLALD,         "SMLALD",                   "111110111100------------110-----")
 //INST(thumb32_SMLSLD,         "SMLSLD",                   "111110111101------------110-----")
-//INST(thumb32_UMLAL,          "UMLAL",                    "111110111110------------0000----")
+INST(thumb32_UMLAL,          "UMLAL",                    "111110111110nnnnllllhhhh0000mmmm")
 //INST(thumb32_UMAAL,          "UMAAL",                    "111110111110------------0110----")
 
 // Coprocessor
diff --git a/src/frontend/A32/translate/impl/thumb32_long_multiply.cpp b/src/frontend/A32/translate/impl/thumb32_long_multiply.cpp
index 13e1b3ec..7c607b71 100644
--- a/src/frontend/A32/translate/impl/thumb32_long_multiply.cpp
+++ b/src/frontend/A32/translate/impl/thumb32_long_multiply.cpp
@@ -49,6 +49,28 @@ bool ThumbTranslatorVisitor::thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_UMLAL(Reg n, Reg dLo, Reg dHi, Reg m) {
+    if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    if (dHi == dLo) {
+        return UnpredictableInstruction();
+    }
+
+    const auto n64 = ir.ZeroExtendWordToLong(ir.GetRegister(n));
+    const auto m64 = ir.ZeroExtendWordToLong(ir.GetRegister(m));
+    const auto product = ir.Mul(n64, m64);
+    const auto addend = ir.Pack2x32To1x64(ir.GetRegister(dLo), ir.GetRegister(dHi));
+    const auto result = ir.Add(product, addend);
+    const auto lo = ir.LeastSignificantWord(result);
+    const auto hi = ir.MostSignificantWord(result).result;
+
+    ir.SetRegister(dLo, lo);
+    ir.SetRegister(dHi, hi);
+    return true;
+}
+
 bool ThumbTranslatorVisitor::thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
     if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) {
         return UnpredictableInstruction();
diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h
index 69d87d5e..d5c7d3a1 100644
--- a/src/frontend/A32/translate/impl/translate_thumb.h
+++ b/src/frontend/A32/translate/impl/translate_thumb.h
@@ -119,6 +119,7 @@ struct ThumbTranslatorVisitor final {
     // thumb32 long multiply, long multiply accumulate, and divide instructions
     bool thumb32_SMLAL(Reg n, Reg dLo, Reg dHi, Reg m);
     bool thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m);
+    bool thumb32_UMLAL(Reg n, Reg dLo, Reg dHi, Reg m);
     bool thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m);
 
     // thumb32 miscellaneous instructions