diff --git a/src/dynarmic/backend/x64/a32_emit_x64.cpp b/src/dynarmic/backend/x64/a32_emit_x64.cpp
index e8ddbce6..4f819825 100644
--- a/src/dynarmic/backend/x64/a32_emit_x64.cpp
+++ b/src/dynarmic/backend/x64/a32_emit_x64.cpp
@@ -715,10 +715,11 @@ void A32EmitX64::EmitA32SetGEFlagsCompressed(A32EmitContext& ctx, IR::Inst* inst
 
 void A32EmitX64::EmitA32DataSynchronizationBarrier(A32EmitContext&, IR::Inst*) {
     code.mfence();
+    code.lfence();
 }
 
 void A32EmitX64::EmitA32DataMemoryBarrier(A32EmitContext&, IR::Inst*) {
-    code.lfence();
+    code.mfence();
 }
 
 void A32EmitX64::EmitA32InstructionSynchronizationBarrier(A32EmitContext& ctx, IR::Inst*) {
diff --git a/src/dynarmic/backend/x64/a64_emit_x64.cpp b/src/dynarmic/backend/x64/a64_emit_x64.cpp
index de54a444..8de3ee5f 100644
--- a/src/dynarmic/backend/x64/a64_emit_x64.cpp
+++ b/src/dynarmic/backend/x64/a64_emit_x64.cpp
@@ -668,10 +668,11 @@ void A64EmitX64::EmitA64InstructionCacheOperationRaised(A64EmitContext& ctx, IR:
 
 void A64EmitX64::EmitA64DataSynchronizationBarrier(A64EmitContext&, IR::Inst*) {
     code.mfence();
+    code.lfence();
 }
 
 void A64EmitX64::EmitA64DataMemoryBarrier(A64EmitContext&, IR::Inst*) {
-    code.lfence();
+    code.mfence();
 }
 
 void A64EmitX64::EmitA64InstructionSynchronizationBarrier(A64EmitContext& ctx, IR::Inst*) {