a64 backend: Load "guest_FPSR"

This commit is contained in:
SachinVin 2019-07-14 20:45:58 +05:30 committed by xperia64
parent 83ef2b7070
commit c4fb80bf05
2 changed files with 12 additions and 9 deletions

View File

@ -146,20 +146,17 @@ void A32JitState::SetFpscr(u32 FPSCR) {
FPSCR_mode = FPSCR & FPSCR_MODE_MASK;
FPSCR_nzcv = FPSCR & FPSCR_NZCV_MASK;
guest_FPCR = 0;
// RMode
guest_FPCR |= FPSCR & 0xC00000;
guest_FPSR = 0;
// Cumulative flags IDC, IOC, IXC, UFC, OFC, DZC
FPSCR_IDC = 0;
FPSCR_UFC = 0;
fpsr_exc = FPSCR & 0x9F;
if (Common::Bit<24>(FPSCR)) {
// VFP Flush to Zero
//guest_MXCSR |= (1 << 15); // SSE Flush to Zero
//guest_MXCSR |= (1 << 6); // SSE Denormals are Zero
}
// Mode Bits
guest_FPCR |= FPSCR & 0x07C09F00;
// Exceptions
guest_FPSR |= FPSCR & 0x9F;
}
u64 A32JitState::GetUniqueHash() const {

View File

@ -226,13 +226,19 @@ void BlockOfCode::GenRunCode() {
void BlockOfCode::SwitchMxcsrOnEntry() {
MRS(ABI_SCRATCH1, Arm64Gen::FIELD_FPCR);
STR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_save_host_FPCR);
LDR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_guest_FPCR);
_MSR(Arm64Gen::FIELD_FPCR, ABI_SCRATCH1);
LDR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_guest_FPSR);
_MSR(Arm64Gen::FIELD_FPSR, ABI_SCRATCH1);
}
void BlockOfCode::SwitchMxcsrOnExit() {
MRS(ABI_SCRATCH1, Arm64Gen::FIELD_FPCR);
STR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_guest_FPCR);
MRS(ABI_SCRATCH1, Arm64Gen::FIELD_FPSR);
STR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_guest_FPSR);
LDR(Arm64Gen::INDEX_UNSIGNED, ABI_SCRATCH1, Arm64Gen::X28, jsi.offsetof_save_host_FPCR);
_MSR(Arm64Gen::FIELD_FPCR, ABI_SCRATCH1);
}