From d459cb6f59f25c20c589780c85cc4b99bad1ef39 Mon Sep 17 00:00:00 2001 From: SachinVin Date: Sun, 29 May 2022 23:10:52 +0530 Subject: [PATCH] backend/A64: clear upper 32bits for PackedAbsDiffSumS8 test case --- src/dynarmic/backend/A64/emit_a64_packed.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/dynarmic/backend/A64/emit_a64_packed.cpp b/src/dynarmic/backend/A64/emit_a64_packed.cpp index 79843f09..948d04c3 100644 --- a/src/dynarmic/backend/A64/emit_a64_packed.cpp +++ b/src/dynarmic/backend/A64/emit_a64_packed.cpp @@ -450,6 +450,7 @@ void EmitA64::EmitPackedAbsDiffSumS8(EmitContext& ctx, IR::Inst* inst) { const ARM64Reg b = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[1])); code.fp_emitter.UABD(B, a, a, b); + code.fp_emitter.FMOV(EncodeRegToSingle(a), a); code.fp_emitter.UADDLV(B, a, a); ctx.reg_alloc.DefineValue(inst, a);