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A64: Implement SQADD and SQSUB, scalar variant

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This commit is contained in:
MerryMage 2018-07-30 11:00:20 +01:00
parent 10e196480f
commit f2393488fe
3 changed files with 46 additions and 24 deletions
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4
src/frontend/A64/decoder/a64.inc
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@ -444,8 +444,8 @@ INST(FMINP_pair_2, "FMINP (scalar)", "01111
//INST(SQDMULL_vec_2, "SQDMULL, SQDMULL2 (vector)", "0Q001110zz1mmmmm110100nnnnnddddd") //INST(SQDMULL_vec_2, "SQDMULL, SQDMULL2 (vector)", "0Q001110zz1mmmmm110100nnnnnddddd")
// Data Processing - FP and SIMD - SIMD Scalar three same // Data Processing - FP and SIMD - SIMD Scalar three same
//INST(SQADD_1, "SQADD", "01011110zz1mmmmm000011nnnnnddddd") INST(SQADD_1, "SQADD", "01011110zz1mmmmm000011nnnnnddddd")
//INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd") INST(SQSUB_1, "SQSUB", "01011110zz1mmmmm001011nnnnnddddd")
INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd") INST(CMGT_reg_1, "CMGT (register)", "01011110zz1mmmmm001101nnnnnddddd")
INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd") INST(CMGE_reg_1, "CMGE (register)", "01011110zz1mmmmm001111nnnnnddddd")
INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd") INST(SSHL_1, "SSHL", "01011110zz1mmmmm010001nnnnnddddd")

44
src/frontend/A64/translate/impl/impl.h
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@ -553,49 +553,27 @@ struct TranslatorVisitor final {
// Data Processing - FP and SIMD - SIMD Scalar three same // Data Processing - FP and SIMD - SIMD Scalar three same
bool SQADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQADD_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGT_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMGT_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGT_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGE_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMGE_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGE_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSHL_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQSHL_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSHL_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool ADD_vector(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMTST_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMTST_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMTST_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQDMULH_vec_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool UQADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQADD_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool UQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHI_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMHI_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHI_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHS_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMHS_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHS_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool USHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool USHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool USHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSHL_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool UQSHL_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSHL_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool URSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool URSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool URSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool UQRSHL_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMEQ_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool CMEQ_reg_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMEQ_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd); bool SQRDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRDMULH_vec_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
// Data Processing - FP and SIMD - SIMD Scalar shift by immediate // Data Processing - FP and SIMD - SIMD Scalar shift by immediate
bool SSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SSHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
@ -852,6 +830,28 @@ struct TranslatorVisitor final {
bool FABD_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd); bool FABD_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd);
bool FCMGT_reg_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd); bool FCMGT_reg_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd);
bool FACGT_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd); bool FACGT_4(bool Q, bool sz, Vec Vm, Vec Vn, Vec Vd);
bool SQADD_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGT_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMGE_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQSHL_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool ADD_vector(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMTST_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQDMULH_vec_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQADD_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHI_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMHS_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool USHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQSHL_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool URSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool UQRSHL_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SUB_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool CMEQ_reg_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
bool SQRDMULH_vec_2(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd);
// Data Processing - FP and SIMD - SIMD modified immediate // Data Processing - FP and SIMD - SIMD modified immediate
bool MOVI(bool Q, bool op, Imm<1> a, Imm<1> b, Imm<1> c, Imm<4> cmode, Imm<1> d, Imm<1> e, Imm<1> f, Imm<1> g, Imm<1> h, Vec Vd); bool MOVI(bool Q, bool op, Imm<1> a, Imm<1> b, Imm<1> c, Imm<4> cmode, Imm<1> d, Imm<1> e, Imm<1> f, Imm<1> g, Imm<1> h, Vec Vd);

22
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
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@ -102,6 +102,28 @@ bool ScalarFPCompareRegister(TranslatorVisitor& v, bool sz, Vec Vm, Vec Vn, Vec
} }
} // Anonymous namespace } // Anonymous namespace
bool TranslatorVisitor::SQADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 8 << size.ZeroExtend<size_t>();
const IR::UAny operand1 = V_scalar(esize, Vn);
const IR::UAny operand2 = V_scalar(esize, Vm);
const auto result = ir.SignedSaturatedAdd(operand1, operand2);
ir.OrQC(result.overflow);
V_scalar(esize, Vd, result.result);
return true;
}
bool TranslatorVisitor::SQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 8 << size.ZeroExtend<size_t>();
const IR::UAny operand1 = V_scalar(esize, Vn);
const IR::UAny operand2 = V_scalar(esize, Vm);
const auto result = ir.SignedSaturatedSub(operand1, operand2);
ir.OrQC(result.overflow);
V_scalar(esize, Vd, result.result);
return true;
}
bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::ADD_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size != 0b11) { if (size != 0b11) {
return ReservedValue(); return ReservedValue();