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Author SHA1 Message Date
Lioncash
13df147ffb
cast_util: Remove unnecessary typename 
Given we use std::aligned_storage_t, we don't need to specify
typename here. If we used std::aligned_storage, then we would need to.
 2018-07-15 19:38:02 -04:00
MerryMage
41074a2547 A64: Implement FADDP (scalar) 2018-07-15 22:49:58 +01:00
MerryMage
59e78dc57e A64: Implement FADDP (vector) 2018-07-15 22:49:58 +01:00
MerryMage
dfdec797e3 A64: Implement SADDLP 2018-07-15 18:50:09 +01:00
MerryMage
3bb6a432d8 A64: Implement UADDLP 2018-07-15 18:26:54 +01:00
MerryMage
c103a28386 A64: Implement EXT 2018-07-15 17:47:32 +01:00
Merry
f23475764f
Merge pull request #289 from MerryMage/fptofixed 
Implement most of the scalar fp -> integer instructions
 2018-07-15 17:12:52 +01:00
MerryMage
d870a75417 emit_x64_floating_point: SSE4.1 implementation for FP{Double,Single}ToFixed{S,U}{32,64} 2018-07-15 17:03:40 +01:00
MerryMage
f0910c357a A64: Implement FCVTMU (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
dd6772786e A64: Implement FCVTMS (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
5b82fa8018 A64: Implement FCVTPU (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
79c4e922db A64: Implement FCVTPS (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
128db2f62a A64: Implement FCVTAU (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
bb92f95b9d A64: Implement FCVTAS (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
8cad14eee6 A64: Implement FCVTNU (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
d3e8cf3e15 A64: Implement FCVTNS (scalar) 2018-07-15 15:37:29 +01:00
MerryMage
ec0c7e1acd floating_point_conversion_integer: Refactor implementation of FCVTZS_float_int and FCVTZU_float_int 2018-07-15 15:37:29 +01:00
MerryMage
2f567fe003 IR: Initial implementation of FP{Double,Single}ToFixed{S,U}{32,64} 
This implementation just falls-back to the software floating point implementation.
 2018-07-15 15:37:29 +01:00
MerryMage
564c1b091f EmitContext: Expose FPCR 2018-07-15 15:37:29 +01:00
MerryMage
5e16785b3a fp/op: Implement FPToFixed 2018-07-15 15:37:29 +01:00
MerryMage
b5658dc310 mantissa_util: Implement ResidualErrorOnRightShift 
Accurately calculate residual error that is shifted out
 2018-07-15 15:37:29 +01:00
MerryMage
4425da9684 tests/fp: Add FPRound tests 2018-07-15 15:37:28 +01:00
MerryMage
cbedf2d498 fp/unpacked: Implement FPRound 2018-07-15 15:37:28 +01:00
MerryMage
b4cf436bfa FPCR: Add AHP setter and FZ16 getter 2018-07-15 15:37:28 +01:00
MerryMage
50ec57e372 mp: Implement metaprogramming library 2018-07-15 15:37:28 +01:00
MerryMage
64f4d14b39 fp: Implement FPUnpack 2018-07-15 14:32:06 +01:00
MerryMage
909e9aae2e fp: Implement FPProcessException 2018-07-15 14:32:06 +01:00
MerryMage
f6cdd58976 fp: Move fp_util to fp/util 2018-07-15 14:32:06 +01:00
MerryMage
60f5ef3a11 fp: Add FPSR 2018-07-15 14:32:06 +01:00
MerryMage
2384b7e6a0 fp: Add FPInfo 
Provides information about floating-point format for various bit sizes
 2018-07-15 14:32:06 +01:00
MerryMage
af82bc4871 safe_ops: Implement safe shifting operations 
Implement shifiting operations that perform consistently across architectures
without running into undefined or implemented-defined behaviour.
 2018-07-15 14:32:06 +01:00
MerryMage
a3a8efb018 bit_util: Implement MostSignificantBit 2018-07-15 14:32:06 +01:00
MerryMage
3f2194dcba bit_util: Use Ones to implement Bits 2018-07-15 14:32:06 +01:00
MerryMage
c319c4a193 bit_util: Add ClearBit and ModifyBit 2018-07-15 14:32:06 +01:00
MerryMage
639b0bb493 u128: Implement u128 
For when we need a 128-bit integer
 2018-07-15 14:32:06 +01:00
Lioncash
6c6cdcec10 A64: Implement UCVTF (vector, integer)'s double/single-precision variant 2018-07-15 12:46:35 +01:00
Lioncash
d921423160 ir: Add opcodes for vector conversion of u32/u64 to floating-point 2018-07-15 12:46:35 +01:00
Lioncash
8754289927 simd_three_different: Deduplicate common implementations 
Generally, the only difference between the signed variants and the
unsigned variants is whether or not we use a sign-extension or
zero-extension, so we can simply use common functions to implement both
cases without totally duplicating code twice here.
 2018-07-15 12:44:49 +01:00
Lioncash
c396261092 floating_point_conversion_integer: Handle S64/U64 -> F32 conversions in SCVTF_float_int and UCVTF_float_int 2018-07-15 12:29:26 +01:00
Lioncash
0b2c6c4eb8 ir: Add opcodes for converting S64 and U64 to single-precision floating-point values 2018-07-15 12:29:26 +01:00
Lioncash
1dc24b6d2e constant_pool: Remove unnecessary std::memset from constructor 
AllocateFromCodeSpace() already zeroes out the allocated memory.
 2018-07-15 12:12:28 +01:00
MerryMage
9dd908de1d fuzz_with_unicorn: Avoid self-modifying code 
* Don't immediately terminate when unicorn raises an interrupt
* Detect self-modifying code
 2018-07-15 12:07:52 +01:00
MerryMage
b81a9a52e1 fuzz_with_unicorn: Configure as per qemu max configuration 2018-07-14 08:51:08 +01:00
Lioncash
751bc31b60 tests/A32/testenv: Add type aliases for register arrays 
Allows avoiding duplicating std::array instance sizes and types.
 2018-07-14 08:22:18 +01:00
Lioncash
badc29f2ea tests/unicorn: Add type aliases to the Unicorn class 
Centralizes all register and vector array definitions to a single set of
aliases, so if these are ever changed, then the rest of the testing code
will follow suit without the need to manually change them.
 2018-07-14 08:22:18 +01:00
Lioncash
ca7a35f55f A64: Implement ADDV 2018-07-14 08:18:51 +01:00
Lioncash
5b5d79144e emit_x64_vector: Vectorize fallback path for EmitVectorMaxU32() 2018-07-14 08:17:46 +01:00
Lioncash
563959908b simd_three_same: Join FPAbsoluteComparison() into FPCompareRegister() 
These are part of the same comparison family, so there's no real point
in keeping them separate.
 2018-07-14 07:50:37 +01:00
Lioncash
7391f70318 A64: Implement scalar double/single-precision variants of FACGE, FACGT, FCMEQ, FCMGE, FCMGT 2018-07-14 07:50:37 +01:00
MerryMage
dbfdb2506a emit_x64_floating_point: Fix EmitFPU64ToDouble for TowardsMinusInfinity rounding mode 2018-07-14 07:11:32 +01:00