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Merge pull request #24 from gemarcano/trim-cleanup

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Fixes issue with uncart freezing when starting up when the MPU was enabled (Like when using a9lh)
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Sebastian Valle 2016-06-23 16:24:46 -07:00 committed by GitHub
commit 9fdb3d16a9
1 changed files with 28 additions and 5 deletions
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source/start.s
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@ -75,9 +75,10 @@ _enable_caches:
push {r4-r5, lr} push {r4-r5, lr}
bl _populate_mpu bl _populate_mpu
mov r5, #0
mcr p15, 0, r5, c7, c5, 0 @ flush I-cache @ Make sure to clean and flush/invalidate data, to make sure there does not
mcr p15, 0, r5, c7, c6, 0 @ flush D-cache @ remain any changes that are not in RAM.
bl _flush_and_clean_caches
mrc p15, 0, r4, c1, c0, 0 mrc p15, 0, r4, c1, c0, 0
orr r4, r4, #(1<<12) @ instruction cache enable orr r4, r4, #(1<<12) @ instruction cache enable
@ -102,9 +103,31 @@ _setup_heap:
str r0, [r1] str r0, [r1]
mov pc, lr mov pc, lr
_flush_and_clean_caches:
@ flush instruction cache, it's not flushed by Nintendo's function
mov r0, #0
mcr p15, 0, r0, c7, c5, 0
@ Nintendo's function uses r0-r2, r12, all registers that don't need
@ to be saved, just be aware that they are changed
@ use Nintendo's bx lr to return
ldr r0, =0xFFFF0830 @ Nintendo's flush function in unprot. bootrom
bx r0
_init: _init:
push {r0-r12, lr} push {r0-r12, lr}
@ Explicitly flush and clean caches, so the stack changes, if written to
@ cacheable memory, do make it to memory before disabling the MPU for
@ configuration changes.
bl _flush_and_clean_caches
@ Disabling the MPU at this point so that changes to caching policies do not
@ yield unexpected behavior.
mrc p15, 0, r4, c1, c0, 0
bic r4, r4, #(1<<0) @ mpu disable
mcr p15, 0, r4, c1, c0, 0
bl _enable_caches bl _enable_caches
bl _fix_sdmc_mount bl _fix_sdmc_mount