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Fixup L3 cache case 0x49

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If EAX descriptor is 0x49, a check must be performed to determine whether or not to set the L3 cache.
This commit is contained in:
Amos 2023-02-11 17:15:43 +01:00
parent c0fe74a321
commit 8f4a5f45e7
1 changed files with 13 additions and 3 deletions
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16
r5dev/tier0/cpu.cpp
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@ -408,9 +408,19 @@ static void InterpretIntelCacheDescriptors(uint32_t nPackedDesc, CPUInformation&
}
for (int i = 0; i < 4; ++i)
{
FindIntelCacheDesc(nPackedDesc & 0xFF, s_IntelL1DataCacheDesc, ARRAYSIZE(s_IntelL1DataCacheDesc), pi.m_nL1CacheSizeKb, pi.m_nL1CacheDesc);
FindIntelCacheDesc(nPackedDesc & 0xFF, s_IntelL2DataCacheDesc, ARRAYSIZE(s_IntelL2DataCacheDesc), pi.m_nL2CacheSizeKb, pi.m_nL2CacheDesc);
FindIntelCacheDesc(nPackedDesc & 0xFF, s_IntelL3DataCacheDesc, ARRAYSIZE(s_IntelL3DataCacheDesc), pi.m_nL3CacheSizeKb, pi.m_nL3CacheDesc);
uint8_t nDesc = nPackedDesc & 0xFF;
FindIntelCacheDesc(nDesc, s_IntelL1DataCacheDesc, ARRAYSIZE(s_IntelL1DataCacheDesc), pi.m_nL1CacheSizeKb, pi.m_nL1CacheDesc);
FindIntelCacheDesc(nDesc, s_IntelL2DataCacheDesc, ARRAYSIZE(s_IntelL2DataCacheDesc), pi.m_nL2CacheSizeKb, pi.m_nL2CacheDesc);
FindIntelCacheDesc(nDesc, s_IntelL3DataCacheDesc, ARRAYSIZE(s_IntelL3DataCacheDesc), pi.m_nL3CacheSizeKb, pi.m_nL3CacheDesc);
int nFamily = (pi.m_nModel >> 8) & 0xF;
int nModel = (pi.m_nModel >> 4) & 0xF;
if (nDesc == 49 && (nFamily != 0x0F || nModel != 0x06))
{
pi.m_nL3CacheSizeKb = 0;
pi.m_nL3CacheDesc = 0;
}
nPackedDesc >>= 8;
}
}