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Swap SSE4.1 instruction with an SSE2 instruction
The min spec is SSSE3, using SSE4.1 instructions (_mm_extract_epi64) will break compatibility. The code containing the defect is debug only, and %90+ of the user base uses an SSE4.1 capable processor.
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@ -138,7 +138,10 @@ void CAI_Utility::DrawAIScriptNetwork(
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int nNearest = GetNearestNodeToPos(pNetwork, &pScriptNode->m_vOrigin);
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if (nNearest != NO_NODE) // NO_NODE = -1
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{
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auto p = uLinkSet.insert(_mm_extract_epi64(PackNodeLink(i, nNearest), 1));
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shortx8 packedLinks = PackNodeLink(i, nNearest);
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packedLinks = _mm_srli_si128(packedLinks, 8); // Only the upper 64bits are used.
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auto p = uLinkSet.insert(reinterpret_cast<int64_t&>(packedLinks));
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if (p.second) // Only render if link hasn't already been rendered.
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{
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const CAI_ScriptNode* pNearestNode = &pNetwork->m_ScriptNode[nNearest];
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@ -536,9 +539,9 @@ void CAI_Utility::DrawNavMeshPolyBoundaries(const dtNavMesh* pMesh,
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// d -
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// Output : packed node set as i64x2
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//------------------------------------------------------------------------------
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__m128i CAI_Utility::PackNodeLink(int32_t a, int32_t b, int32_t c, int32_t d) const
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shortx8 CAI_Utility::PackNodeLink(int32_t a, int32_t b, int32_t c, int32_t d) const
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{
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__m128i xResult = _mm_set_epi32(a, b, c, d);
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shortx8 xResult = _mm_set_epi32(a, b, c, d);
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// We shuffle a b and c d if following condition is met, this is to
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// ensure we always end up with one possible combination of indices.
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@ -57,7 +57,7 @@ public:
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const int nTileRange,
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const bool bDepthBuffer) const;
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__m128i PackNodeLink(int32_t a, int32_t b, int32_t c = 0, int32_t d = 0) const;
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shortx8 PackNodeLink(int32_t a, int32_t b, int32_t c = 0, int32_t d = 0) const;
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int GetNearestNodeToPos(const CAI_Network* pAINetwork, const Vector3D* vec) const;
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bool IsTileWithinRange(const dtMeshTile* pTile, const VPlane& vPlane, const Vector3D& vCamera, const float flCameraRadius) const;
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