mirror of
https://github.com/Mauler125/r5sdk.git
synced 2025-02-09 19:15:03 +01:00
196db8660e
* Improve ConVar class (fixed several bugs). * Hook CEngineAPI::ModInit() and set m_bRestrictServerCommands from there. * Disable unused ConVar's and purge unused ConCommands in CEngineAPI::ModInit() for dedicated. * Small relocation of malloc related signatures.
108 lines
2.3 KiB
C
108 lines
2.3 KiB
C
#ifndef PLATFORM_H
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#define PLATFORM_H
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#if defined( _WIN32 ) && defined( _MSC_VER ) && ( _MSC_VER >= 1400 )
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#pragma intrinsic(__rdtsc)
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#endif
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inline uint64_t Plat_Rdtsc()
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{
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#if defined( _X360 )
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return (uint64)__mftb32();
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#elif defined( _WIN64 )
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return (uint64_t)__rdtsc();
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#elif defined( _WIN32 )
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#if defined( _MSC_VER ) && ( _MSC_VER >= 1400 )
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return (uint64_t)__rdtsc();
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#else
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__asm rdtsc;
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__asm ret;
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#endif
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#elif defined( __i386__ )
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uint64 val;
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__asm__ __volatile__("rdtsc" : "=A" (val));
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return val;
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#elif defined( __x86_64__ )
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uint32 lo, hi;
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__asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
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return (((uint64)hi) << 32) | lo;
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#else
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#error
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#endif
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}
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// Processor Information:
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struct CPUInformation
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{
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int m_Size; // Size of this structure, for forward compatability.
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uint8_t m_nLogicalProcessors; // Number op logical processors.
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uint8_t m_nPhysicalProcessors; // Number of physical processors
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bool m_bRDTSC : 1, // Is RDTSC supported?
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m_bCMOV : 1, // Is CMOV supported?
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m_bFCMOV : 1, // Is FCMOV supported?
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m_bSSE : 1, // Is SSE supported?
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m_bSSE2 : 1, // Is SSE2 Supported?
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m_b3DNow : 1, // Is 3DNow! Supported?
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m_bMMX : 1, // Is MMX supported?
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m_bHT : 1; // Is HyperThreading supported?
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bool m_bSSE3 : 1,
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m_bSSSE3 : 1,
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m_bSSE4a : 1,
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m_bSSE41 : 1,
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m_bSSE42 : 1,
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m_bAVX : 1; // Is AVX supported?
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int64_t m_Speed; // In cycles per second.
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char* m_szProcessorID; // Processor vendor Identification.
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char* m_szProcessorBrand; // Processor brand string, if available
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uint32_t m_nModel;
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uint32_t m_nFeatures[3];
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uint32_t m_nL1CacheSizeKb;
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uint32_t m_nL1CacheDesc;
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uint32_t m_nL2CacheSizeKb;
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uint32_t m_nL2CacheDesc;
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uint32_t m_nL3CacheSizeKb;
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uint32_t m_nL3CacheDesc;
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CPUInformation() : m_Size(0)
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{
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m_Size = 0;
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m_nLogicalProcessors = 0;
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m_nPhysicalProcessors = 0;
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m_bRDTSC = false;
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m_bCMOV = false;
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m_bCMOV = false;
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m_bFCMOV = false;
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m_bSSE = false;
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m_bSSE2 = false;
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m_b3DNow = false;
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m_bMMX = false;
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m_bHT = false;
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m_Speed = 0i64;
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m_szProcessorID = nullptr;
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m_szProcessorBrand = nullptr;
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m_nModel = 0;
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m_nFeatures[0] = 0;
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m_nFeatures[1] = 0;
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m_nFeatures[2] = 0;
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m_nL1CacheSizeKb = 0;
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m_nL1CacheDesc = 0;
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m_nL2CacheSizeKb = 0;
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m_nL2CacheDesc = 0;
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m_nL3CacheSizeKb = 0;
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m_nL3CacheDesc = 0;
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}
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};
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#endif /* PLATFORM_H */ |