mirror of
https://github.com/Mauler125/r5sdk.git
synced 2025-02-09 19:15:03 +01:00
723052eb6f
Structure now fully aligns with that of the engine, with exception of newly added fields for the SDK (new fields are marked in the structure definition).
130 lines
3.1 KiB
C
130 lines
3.1 KiB
C
//===== Copyright (c) 1996-2005, Valve Corporation, All rights reserved. ======//
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//
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// Purpose:
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//
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// $NoKeywords: $
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//=============================================================================//
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#ifndef CPU_H
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#define CPU_H
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//-----------------------------------------------------------------------------
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// CPUID Result:
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//-----------------------------------------------------------------------------
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struct CpuIdResult_t
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{
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unsigned long eax;
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unsigned long ebx;
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unsigned long ecx;
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unsigned long edx;
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void Reset(void)
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{
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eax = ebx = ecx = edx = 0;
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}
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};
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//-----------------------------------------------------------------------------
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// CPU Brand:
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//-----------------------------------------------------------------------------
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union CpuBrand_t
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{
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CpuIdResult_t cpuid[3];
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char name[49];
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};
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//-----------------------------------------------------------------------------
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// Processor Information:
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//-----------------------------------------------------------------------------
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struct CPUInformation
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{
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int m_Size; // Size of this structure, for forward compatibility.
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bool m_bRDTSC : 1, // Is RDTSC supported?
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m_bCMOV : 1, // Is CMOV supported?
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m_bFCMOV : 1, // Is FCMOV supported?
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m_bSSE : 1, // Is SSE supported?
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m_bSSE2 : 1, // Is SSE2 Supported?
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m_b3DNow : 1, // Is 3DNow! Supported?
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m_bMMX : 1, // Is MMX supported?
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m_bHT : 1; // Is HyperThreading supported?
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uint8 m_nLogicalProcessors; // Number op logical processors.
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uint8 m_nPhysicalProcessors; // Number of physical processors.
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int64 m_Speed; // In cycles per second.
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char* m_szProcessorID; // Processor vendor Identification.
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// !!! any member below here is SDK specific and does NOT exist in the game engine !!!
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char* m_szProcessorBrand; // Processor brand string, if available.
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bool m_bSSE3 : 1,
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m_bSSSE3 : 1,
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m_bSSE4a : 1,
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m_bSSE41 : 1,
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m_bSSE42 : 1,
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m_bAVX : 1; // Is AVX supported?
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uint32 m_nModel;
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uint32 m_nFeatures[3];
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uint32 m_nL1CacheSizeKb;
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uint32 m_nL1CacheDesc;
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uint32 m_nL2CacheSizeKb;
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uint32 m_nL2CacheDesc;
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uint32 m_nL3CacheSizeKb;
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uint32 m_nL3CacheDesc;
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CPUInformation() : m_Size(0)
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{
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m_Size = 0;
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m_bRDTSC = false;
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m_bCMOV = false;
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m_bFCMOV = false;
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m_bSSE = false;
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m_bSSE2 = false;
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m_b3DNow = false;
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m_bMMX = false;
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m_bHT = false;
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m_nLogicalProcessors = 0;
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m_nPhysicalProcessors = 0;
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m_Speed = NULL;
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m_szProcessorID = nullptr;
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m_szProcessorBrand = nullptr;
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m_bSSE3 = false;
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m_bSSSE3 = false;
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m_bSSE4a = false;
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m_bSSE41 = false;
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m_bSSE42 = false;
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m_bAVX = false;
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m_nModel = 0;
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m_nFeatures[0] = 0;
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m_nFeatures[1] = 0;
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m_nFeatures[2] = 0;
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m_nL1CacheSizeKb = 0;
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m_nL1CacheDesc = 0;
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m_nL2CacheSizeKb = 0;
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m_nL2CacheDesc = 0;
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m_nL3CacheSizeKb = 0;
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m_nL3CacheDesc = 0;
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}
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};
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bool CheckSSE3Technology(void);
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bool CheckSSSE3Technology(void);
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bool CheckSSE41Technology(void);
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bool CheckSSE42Technology(void);
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bool CheckSSE4aTechnology(void);
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const char* GetProcessorVendorId(void);
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const char* GetProcessorBrand(bool bRemovePadding);
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const CPUInformation& GetCPUInformation(void);
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#endif // CPU_H
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