2206 Commits

Author SHA1 Message Date
SachinVin
d2847a202e backend\A64\emit_a64_packed.cpp: Implement UnsignedPacked*- ADD and SUB...
with few other in the emitter
2020-04-07 23:07:24 -05:00
SachinVin
5550e6f157 a64 emitter: fix Scalar Saturating Instructions 2020-04-07 23:07:24 -05:00
SachinVin
5d6242ac46 A64 Emitter: Implement Saturating Add and Sub 2020-04-07 23:07:24 -05:00
SachinVin
5e55e8297f backend\A64\emit_a64_data_processing.cpp: Implement Division 2020-04-07 23:07:24 -05:00
SachinVin
d6f0b3532f backend\A64\emit_a64_data_processing.cpp: Implement 64bit CLZ 2020-04-07 23:07:24 -05:00
SachinVin
b9c6a99cf5 backend\A64\emit_a64_data_processing.cpp: Implement 64bit LSL and ROR Instructions
Also EmitTestBit
2020-04-07 23:07:24 -05:00
SachinVin
2ff25d4fbb backend\A64\emit_a64_data_processing.cpp: Implement 64bit Logical Instructions 2020-04-07 23:07:24 -05:00
SachinVin
f33a51cb09 backend/a64: implememnt CheckBit 2020-04-07 23:07:23 -05:00
SachinVin
2dc985237b backend/a64: Redesign Const Pool 2020-04-07 23:07:23 -05:00
SachinVin
66978a9fb7 backend\A64\emit_a64_floating_point.cpp: Fix include paths 2020-04-07 23:07:23 -05:00
SachinVin
5af7146374 backend\A64\a32_emit_a64.cpp: Fix Coproc* after rebase 2020-04-07 23:07:23 -05:00
SachinVin
0fbb8a5a73 backend/a64/opcodes.inc: Coproc instructions 2020-04-07 23:07:23 -05:00
SachinVin
49dce5c8fa a64 emitter: Fix LDR literal 2020-04-07 23:07:23 -05:00
SachinVin
ec41144951 a64 emitter: Move IsInRange* and MaskImm* into anon namespace 2020-04-07 23:07:23 -05:00
SachinVin
d309b0a917 backend\A64\emit_a64_floating_point.cpp: Implement VADD VSUB VMUL and other stuff 2020-04-07 23:07:23 -05:00
SachinVin
ee981d64ea backend\A64\emit_a64_floating_point.cpp: Implement VABS VNEG VCMP and a few others 2020-04-07 23:07:23 -05:00
SachinVin
a44e2cbdd0 frontend/A32/Decoder : (backend/a64)VMOV 2020-04-07 23:07:23 -05:00
SachinVin
f9696def84 backend\A64\emit_a64_floating_point.cpp: Implement VCVT instructions 2020-04-07 23:07:23 -05:00
SachinVin
b947f47c3f backend\A64\emit_a64_floating_point.cpp: part 1 2020-04-07 23:07:23 -05:00
SachinVin
e761af6a6c backend/a64/reg_alloc: Fix EmitMove for FPRs 2020-04-07 23:07:23 -05:00
SachinVin
49407c1b0b A64 emitter: Support for 64bit FMOV 2020-04-07 23:07:23 -05:00
SachinVin
1025f8b24c a64 backend: Load "guest_FPSR" 2020-04-07 23:07:23 -05:00
SachinVin
701b851964 A64 backend: Add Get/SetExtendedRegister and Get/SetGEFlags 2020-04-07 23:07:23 -05:00
SachinVin
3ad30f2de3 tests: Dont compile A64 tests for non x64 backend 2020-04-07 23:07:23 -05:00
SachinVin
f22f1a8a92 travis a64: unicorn 2020-04-07 23:07:03 -05:00
SachinVin
4ebf381ece travis a64 backend 2020-04-07 23:07:03 -05:00
SachinVin
0d2213bb41 Frontend/A32: a64 backend; Interpret SEL 2020-04-07 23:07:03 -05:00
SachinVin
c2a47d98b8 frontend/A32: A64 Backend implemented instructions 2020-04-07 23:07:03 -05:00
SachinVin
944b31a2fd backend\A64\emit_a64_data_processing.cpp: Implement REV and CLZ ops 2020-04-07 23:07:03 -05:00
SachinVin
fa1dca005f backend\A64\emit_a64_data_processing.cpp: Implement Sext an Zext ops 2020-04-07 23:07:03 -05:00
SachinVin
5ef6c28cb5 backend\A64\emit_a64_data_processing.cpp: Implement Logical ops 2020-04-07 23:07:03 -05:00
SachinVin
6008e63a4b backend\A64\emit_a64_data_processing.cpp: Implement Arithmetic ops 2020-04-07 23:07:03 -05:00
SachinVin
41ca83102e backend\A64\emit_a64_data_processing.cpp: Implement Shift and Rotate ops 2020-04-07 23:07:03 -05:00
SachinVin
5af0945b6d backend\A64\emit_a64_data_processing.cpp:Implement ops 2020-04-07 23:07:03 -05:00
SachinVin
157fce5ab9 backend\A64\emit_a64_data_processing.cpp: Mostly empty file 2020-04-07 23:07:03 -05:00
SachinVin
b06f3e0f2f backend/a64: Add a32_interface 2020-04-07 23:07:03 -05:00
SachinVin
1a184e0cb6 backend/a64: Port a32_emit_a64 2020-04-07 23:07:03 -05:00
SachinVin
10e0f70aa9 backend/a64: Port block_of_code and emit_a64 2020-04-07 23:07:03 -05:00
SachinVin
01b2ea1ca3 backend/a64: Port callback functions 2020-04-07 23:07:03 -05:00
SachinVin
36e22a6ebf backend/a64: Port exception handler 2020-04-07 23:07:03 -05:00
SachinVin
ac1b058650 backend/a64: Port const pool 2020-04-07 23:07:03 -05:00
SachinVin
d34ce15d01 backend/a64: Port reg_alloc 2020-04-07 23:07:03 -05:00
SachinVin
30a67b6f9b backend/a64: Port ABI functions 2020-04-07 23:07:03 -05:00
SachinVin
43ad1ab4a4 backend/a64: Port perfmap 2020-04-07 23:07:03 -05:00
SachinVin
53c0761748 backend/a64: Port hostloc 2020-04-07 23:07:03 -05:00
SachinVin
a7c08a6240 backend/a64: Devirtualize functions for a64 2020-04-07 23:07:03 -05:00
SachinVin
2d9d104719 backend/a64: Port block_range_info 2020-04-07 23:07:03 -05:00
SachinVin
01a943c3d3 CMakeModules\DetectArchitecture.cmake: Refactor ARCHITECTURE to DYNARMIC_ARCHITECTURE
Don't rely on super-project's definition of ARCHITECTURE
2020-04-07 23:07:03 -05:00
SachinVin
3eced9ffc3 [HACK] A32/exception_generating: Interpret undefined instructions 2020-04-07 23:07:03 -05:00
SachinVin
0a945f8c0b [HACK] CMakeLists: Do not build A64 tests on AArch64 2020-04-07 23:07:03 -05:00