2206 Commits

Author SHA1 Message Date
SachinVin
b80bde7c0d frontend/A32: remove decoder hack vfp instructions 2020-04-25 19:15:22 +05:30
SachinVin
880c31a858 a64_emiter: CountLeadingZeros intrinsic shortcuts 2020-04-24 21:23:38 +05:30
BreadFish64
bcc14dcb0e emit_a64: get rid of useless NOP generation
We don't actually patch anything in those locations beside a jump.
2020-04-20 15:11:25 -05:00
SachinVin
894c6c4016 emit_a64: Do not clear fast_dispatch_table unnecessarily
port 4305c74 - emit_x64: Do not clear fast_dispatch_table unnecessarily
2020-04-18 14:28:21 +05:30
SachinVin
7ecd068069 backend/A64/block_of_code.cpp: Clean up C style casts 2020-04-18 14:19:01 +05:30
SachinVin
083d354ac2 backend/A64/a32_emit_a64.cpp: EmitA32{Get,Set}Fpscr, set the guest_fpcr to host fpcr 2020-04-14 21:49:29 +05:30
SachinVin
c7957fe153 backend/A64: Add Step 2020-04-11 10:39:41 +05:30
SachinVin
7c8f7381b7 backend/A64/block_of_code: Always specify codeptr to run from 2020-04-11 10:39:33 +05:30
BreadFish64
1832425c4a backend/A64: fix mp 2020-04-07 23:22:59 -05:00
SachinVin
8682440145 backend/A64: Move SP to FP in GenMemoryAccessors + Minor cleanup and 2020-04-07 23:22:31 -05:00
SachinVin
c3ee450aeb backend/A64: Use X26 for storing remaining cycles. 2020-04-07 23:22:31 -05:00
BreadFish64
af4c225f9f backend/A64: add fastmem support
fix crash on game close

fix generic exception handler

reorder hostloc gpr list

use temp register instead of X0 for writes

go back to regular std::partition
2020-04-07 23:22:31 -05:00
BreadFish64
892c7904ca merge fastmem 2020-04-07 23:22:31 -05:00
SachinVin
b8bac24fd4 backend\A64\constant_pool.cpp: Correct offset calculation 2020-04-07 23:07:24 -05:00
SachinVin
a79bd7e8c8 backend/A64/a32_jitstate: Upstream changes from x64 backend 2020-04-07 23:07:24 -05:00
SachinVin
ef898c6181 backend/A64: Add test for q flag being incorrectly set 2020-04-07 23:07:24 -05:00
SachinVin
9f07aa0b7d backend/A64/a32_emit_a64.cpp: Use unused HostCall registers 2020-04-07 23:07:24 -05:00
SachinVin
ff5c3d5ab5 backend/A64/a32_emit_a64.cpp: Use MOVP2R instead of MOVI2R. 2020-04-07 23:07:24 -05:00
SachinVin
3972263e73 backend/A64/abi: Fix FP caller and callee save registers 2020-04-07 23:07:24 -05:00
SachinVin
c3bc26b6f5 a64/block_of_code: use GetWritableCodePtr() instead of const_cast<...>(GetCodePtr()) 2020-04-07 23:07:24 -05:00
SachinVin
b7b65f10e6 backend/A64/constant_pool: Clean up unused stuff 2020-04-07 23:07:24 -05:00
SachinVin
aa95927614 emit_a64_data_processing.cpp: remove pointless DoNZCV. 2020-04-07 23:07:24 -05:00
SachinVin
8cd195beaf IR + backend/*: add SetCpsrNZCVRaw and change arg1 type of SetCpsrNZCV to IR::NZCV 2020-04-07 23:07:24 -05:00
SachinVin
5246568d10 backend/A64: Fix ASR impl 2020-04-07 23:07:24 -05:00
SachinVin
103ab07fa4 a64_emitter: Use Correct alias for ZR and WZR in CMP 2020-04-07 23:07:24 -05:00
SachinVin
1e37ecaa25 backend/A64: Use CSLE instead of branches for LSL LSR and ASR + minor cleanup 2020-04-07 23:07:24 -05:00
SachinVin
6ab3c04037 backend/A64: Use correct register size for EmitNot64 2020-04-07 23:07:24 -05:00
SachinVin
ea2c5e6dce tests/A32: Check if Q flag is cleared properly 2020-04-07 23:07:24 -05:00
SachinVin
fcfd3f3183 backend/A64: SignedSaturatedSub and SignedSaturatedAdd 2020-04-07 23:07:24 -05:00
SachinVin
1b6d9e417f backend/A64/emit_a64_saturation.cpp: Implement EmitSignedSaturation and EmitUnsignedSaturation
Implements SSAT SSAT16 USAT USAT16 QASX QSAX UQASX UQSAX
2020-04-07 23:07:24 -05:00
SachinVin
82488c7feb backend/A64: add emit_a64_saturation.cpp 2020-04-07 23:07:24 -05:00
SachinVin
8eea0660ce backend/A64: Fix EmitA32SetCpsr 2020-04-07 23:07:24 -05:00
SachinVin
cc1caa5007 backend/A64/devirtualize: remove unused DevirtualizeItanium 2020-04-07 23:07:24 -05:00
SachinVin
4cdb8ec142 backend/A64: refactor to fpscr from mxcsr 2020-04-07 23:07:24 -05:00
SachinVin
f671e1ef4d backend/A64: Use ScratchGpr() instead of ABI_SCRATCH1 where possible 2020-04-07 23:07:24 -05:00
SachinVin
743aa2385e backend/A64: support for always_little_endian 2020-04-07 23:07:24 -05:00
SachinVin
a11111bcde backend/a64: Add hook_hint_instructions option
534eb0f
2020-04-07 23:07:24 -05:00
SachinVin
2d5b21ecc2 backend /A64: cleanup 2020-04-07 23:07:24 -05:00
SachinVin
23d30423d7 gitignore: add .vs dir 2020-04-07 23:07:24 -05:00
SachinVin
962a359ec4 Minor style fix 2020-04-07 23:07:24 -05:00
SachinVin
b883dbe240 backend\A64\emit_a64_packed.cpp: Implement AddSub halving and non halving 2020-04-07 23:07:24 -05:00
SachinVin
6adc894ffd backend\A64: Instructions that got implemented on the way 2020-04-07 23:07:24 -05:00
SachinVin
93a183de02 backend\A64\emit_a64_packed.cpp: Implement Unsigned Sum of Absolute Differences 2020-04-07 23:07:24 -05:00
SachinVin
e3b8eb1735 a64 emitter: Absolute Difference and add across vector instructions 2020-04-07 23:07:24 -05:00
SachinVin
664914d141 backend\A64\emit_a64_packed.cpp: Implement Packed Select 2020-04-07 23:07:24 -05:00
SachinVin
a4ca210798 Backend/a64: Fix asset when falling back to interpreter 2020-04-07 23:07:24 -05:00
SachinVin
ea2c98a7c3 backend\A64\emit_a64_packed.cpp: Implement Packed Halving Add/Sub instructions 2020-04-07 23:07:24 -05:00
SachinVin
93c946dfb3 backend\A64\emit_a64_packed.cpp: Implement Packed Saturating instructions 2020-04-07 23:07:24 -05:00
SachinVin
d3c4ffbdc8 backend\A64\emit_a64_packed.cpp: Implement SignedPacked*- ADD and SUB 2020-04-07 23:07:24 -05:00
SachinVin
0f00a1a00b a64 emitter: Vector Halving and Saturation instructions 2020-04-07 23:07:24 -05:00