Citra-emu/dynarmic-android
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Author SHA1 Message Date
SachinVin
544988c1f4 backend/a64: Port callback functions 2020-05-16 17:15:17 +05:30
SachinVin
4b53c90bfb backend/a64: Port exception handler 2020-05-16 17:15:16 +05:30
SachinVin
53056f0a95 backend/a64: Port const pool 2020-05-16 17:15:16 +05:30
SachinVin
0e5e9759b6 backend/a64: Port reg_alloc 2020-05-16 17:15:16 +05:30
SachinVin
b06c8acce4 backend/a64: Port ABI functions 2020-05-16 17:15:15 +05:30
SachinVin
5f1209dc11 backend/a64: Port perfmap 2020-05-16 17:15:15 +05:30
SachinVin
69610e6ee9 backend/a64: Port hostloc 2020-05-16 17:15:15 +05:30
SachinVin
87f1181293 backend/a64: Devirtualize functions for a64 2020-05-16 17:15:14 +05:30
SachinVin
bfeb8d5356 backend/a64: Port block_range_info 2020-05-16 17:15:14 +05:30
SachinVin
642dd7607b CMakeModules\DetectArchitecture.cmake: Refactor ARCHITECTURE to DYNARMIC_ARCHITECTURE 
Don't rely on super-project's definition of ARCHITECTURE
 2020-05-16 17:15:14 +05:30
SachinVin
beecfca9f9 [HACK] A32/exception_generating: Interpret undefined instructions 2020-05-16 17:15:14 +05:30
SachinVin
df2bb10f33 [HACK] CMakeLists: Do not build A64 tests on AArch64 2020-05-16 17:15:13 +05:30
MerryMage
fba55874d2 fuzz_thumb: Add [JitA64] tag to supported instructions 2020-05-16 17:15:13 +05:30
SachinVin
ccef3889b4 backend/A64: Port a32_jitstate 2020-05-16 17:15:13 +05:30
MerryMage
1cc82ddff5 code_block: Support Windows and fix munmap check 2020-05-16 17:15:12 +05:30
SachinVin
56d43156f9 ir_opt: Port a32_merge_interpreter_blocks 2020-05-16 17:15:12 +05:30
SachinVin
235b6d2288 assert: Use __android_log_print on Android 2020-05-16 17:15:12 +05:30
SachinVin
2a5792bfbb CMakeLists: xbyak should only be linked on x64 2020-05-16 17:14:23 +05:30
SachinVin
d49816d794 a64_emitter: Fix ABI push and pop 2020-05-16 17:14:23 +05:30
SachinVin
6dc4c262f2 a64_emitter: More style cleanup 2020-05-16 17:14:23 +05:30
SachinVin
9bbc4d5353 a64_emitter: Style cleanup 2020-05-16 17:14:22 +05:30
BreadFish64
daf74884a2 Backend/A64: add jitstate_info.h 2020-05-16 17:14:22 +05:30
BreadFish64
cb07edb006 Backend/A64: Add Dolphin's ARM emitter 2020-05-16 17:14:22 +05:30
BreadFish64
21febaab9f Add aarch64 CI 2020-05-16 17:14:21 +05:30
MerryMage
1e291059e2 a64_emit_x64: Invalid regalloc code for EmitA64ExclusiveReadMemory128 
Attempted to allocate args[0] after end of allocation scope
 2020-05-16 12:31:12 +01:00
MerryMage
f4c75dbc38 A32/ASIMD: ARMv8: Implement VLD{1-4} (multiple) 2020-05-16 12:30:09 +01:00
MerryMage
e7f1a0d408 A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H} 2020-05-15 21:07:36 +01:00
Lioncash
8808b8c479 cpu_info: Make test non-allocating 
Same behavior, but makes it non-allocating by using a constexpr
std::array instead of a std::vector.
 2020-05-12 09:52:55 +01:00
Lioncash
af3b65b135 decoder_detail: Mark GetMaskAndExpect() as constexpr 
Elides quite a bit of code at runtime when constructing the decoding
tables.
 2020-05-11 08:29:06 +01:00
MerryMage
59db2c191a VFPv3: Implement VMOV (immediate) 2020-05-10 15:09:37 +01:00
MerryMage
7f77a04900 fuzz_arm: Do not test vfp_VMRS 
This may emit a vmrs *, fpscr instruction.
This results in fuzz failures due to slight inaccuracies in fpscr emulation.
 2020-05-10 14:47:21 +01:00
MerryMage
3c86d58064 VFPv4: Implement VCVTB, VCVTT 2020-05-10 14:45:18 +01:00
MerryMage
010fab9a0e VFPv4: Implement VFMA, VFMS 2020-05-10 14:20:11 +01:00
MerryMage
8e97b10acb VFPv4: Implement VFNMS, VFNMA 2020-05-10 14:14:03 +01:00
MerryMage
6df660c889 fuzz_arm: Ensure all instructions are fuzzed 
* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
 2020-05-10 13:57:39 +01:00
MerryMage
9a38c7324f A32: Add decoders for remaining v7 instructions 2020-05-10 10:50:34 +01:00
MerryMage
8b3bc92bce backend/x64: Reduce conversions required for cpsr_nzcv 
The guest program often accesses the NZCV flags directly much less
often than we need to use them for jumps and other such uses.

Therefore, we store our flags in cpsr_nzcv in a x64-friendly format.

This allows for a reduction in conditional jump related code.
 2020-05-06 22:38:06 +01:00
merry
f4922a97f6
Merge pull request #516 from FernandoS27/user-config 
Changes to A64 exclusive memory emulation:

- Allow changing the dynarmic's interface processor Id.
- Add a new wall_clock_cntpct to remove redundant code when a host timer is used instead of a cycle timer.
- Refactor Exclusive memory to use a combination of both dynarmic's and QEMU's approach, thus eliminating false negative when one cpu core does a non-exclusive write on memory marked as exclusive in another cpu core.
- Add an Exceptional Exit for callbacks that exit dynarmic execution in unconventional ways. This is normally done when a thread sleeps/pauses on an SVC and wakes up later. Since the code cache may have changed or the thread was migrated to another interface, it isn't safe to return to dynarmic.
 2020-05-03 01:42:57 +01:00
Fernando Sahmkow
d7abae1e31 A64: Implement Exceptional Exit. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
41521ed856 User Config: Add option to specify wall clock CNTPCT. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
97b9d3e058 Exclusive Monitor: Rework exclusive monitor interface. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
b5d8b24a3c Exclusive Monitor: Allow clearing a single processor. 2020-05-03 01:40:36 +01:00
Fernando Sahmkow
2068658a82 A64 Interface: Allow changing processor id. 
This commit allows the JIT to be used per guest thread and change it's
core when the thread is migrated.
 2020-05-03 01:40:36 +01:00
MerryMage
d86a6f2211 print_info: Print IR for A32 instructions 2020-04-29 15:33:56 +01:00
MerryMage
8498ac34d5 fuzz_with_unicorn: Print IR 2020-04-29 15:33:38 +01:00
MerryMage
24229ab899 constant_propagation_pass: Don't fold add if we nee flags 
Results in incorrect flags
 2020-04-29 15:33:12 +01:00
MerryMage
e7166e8ba7 constant_propagation_pass: Fold add and sub 2020-04-29 14:16:17 +01:00
MerryMage
dca983803a translate_arm: ConditionPassed: Some instructions emit no microinstructions 2020-04-24 13:12:13 +01:00
MerryMage
94d0d33e02 Fix single stepping for certain instructions 
Several issues:
1. Several terminal instructions did not stop at the end of a single-step block
2. x64 backend for the A32 frontend sometimes polluted upper_location_descriptor with the single-stepping flag

We also introduce the enable_optimizations parameter to the A32 frontend.
 2020-04-24 11:44:38 +01:00
MerryMage
591e7667f2 externals: Update fmt to 6.2.0 
Merge commit 'c9dec5da8cb2893219c069f92728fb3997c7d81e'
 2020-04-23 21:03:34 +01:00