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a79bd7e8c8
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backend/A64/a32_jitstate: Upstream changes from x64 backend
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2020-04-07 23:07:24 -05:00 |
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ef898c6181
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backend/A64: Add test for q flag being incorrectly set
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2020-04-07 23:07:24 -05:00 |
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9f07aa0b7d
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backend/A64/a32_emit_a64.cpp: Use unused HostCall registers
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2020-04-07 23:07:24 -05:00 |
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ff5c3d5ab5
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backend/A64/a32_emit_a64.cpp: Use MOVP2R instead of MOVI2R.
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2020-04-07 23:07:24 -05:00 |
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3972263e73
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backend/A64/abi: Fix FP caller and callee save registers
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2020-04-07 23:07:24 -05:00 |
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c3bc26b6f5
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a64/block_of_code: use GetWritableCodePtr() instead of const_cast<...>(GetCodePtr())
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2020-04-07 23:07:24 -05:00 |
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b7b65f10e6
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backend/A64/constant_pool: Clean up unused stuff
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2020-04-07 23:07:24 -05:00 |
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aa95927614
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emit_a64_data_processing.cpp: remove pointless DoNZCV.
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2020-04-07 23:07:24 -05:00 |
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8cd195beaf
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IR + backend/*: add SetCpsrNZCVRaw and change arg1 type of SetCpsrNZCV to IR::NZCV
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2020-04-07 23:07:24 -05:00 |
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5246568d10
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backend/A64: Fix ASR impl
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2020-04-07 23:07:24 -05:00 |
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103ab07fa4
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a64_emitter: Use Correct alias for ZR and WZR in CMP
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2020-04-07 23:07:24 -05:00 |
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1e37ecaa25
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backend/A64: Use CSLE instead of branches for LSL LSR and ASR + minor cleanup
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2020-04-07 23:07:24 -05:00 |
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6ab3c04037
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backend/A64: Use correct register size for EmitNot64
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2020-04-07 23:07:24 -05:00 |
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ea2c5e6dce
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tests/A32: Check if Q flag is cleared properly
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2020-04-07 23:07:24 -05:00 |
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fcfd3f3183
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backend/A64: SignedSaturatedSub and SignedSaturatedAdd
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2020-04-07 23:07:24 -05:00 |
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1b6d9e417f
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backend/A64/emit_a64_saturation.cpp: Implement EmitSignedSaturation and EmitUnsignedSaturation
Implements SSAT SSAT16 USAT USAT16 QASX QSAX UQASX UQSAX
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2020-04-07 23:07:24 -05:00 |
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backend/A64: add emit_a64_saturation.cpp
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2020-04-07 23:07:24 -05:00 |
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8eea0660ce
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backend/A64: Fix EmitA32SetCpsr
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2020-04-07 23:07:24 -05:00 |
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cc1caa5007
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backend/A64/devirtualize: remove unused DevirtualizeItanium
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2020-04-07 23:07:24 -05:00 |
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4cdb8ec142
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backend/A64: refactor to fpscr from mxcsr
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2020-04-07 23:07:24 -05:00 |
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backend/A64: Use ScratchGpr() instead of ABI_SCRATCH1 where possible
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2020-04-07 23:07:24 -05:00 |
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743aa2385e
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backend/A64: support for always_little_endian
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2020-04-07 23:07:24 -05:00 |
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a11111bcde
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backend/a64: Add hook_hint_instructions option
534eb0f
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2020-04-07 23:07:24 -05:00 |
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2d5b21ecc2
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backend /A64: cleanup
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2020-04-07 23:07:24 -05:00 |
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23d30423d7
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gitignore: add .vs dir
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2020-04-07 23:07:24 -05:00 |
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962a359ec4
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Minor style fix
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2020-04-07 23:07:24 -05:00 |
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b883dbe240
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backend\A64\emit_a64_packed.cpp: Implement AddSub halving and non halving
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2020-04-07 23:07:24 -05:00 |
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6adc894ffd
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backend\A64: Instructions that got implemented on the way
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2020-04-07 23:07:24 -05:00 |
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93a183de02
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backend\A64\emit_a64_packed.cpp: Implement Unsigned Sum of Absolute Differences
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2020-04-07 23:07:24 -05:00 |
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e3b8eb1735
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a64 emitter: Absolute Difference and add across vector instructions
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2020-04-07 23:07:24 -05:00 |
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664914d141
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backend\A64\emit_a64_packed.cpp: Implement Packed Select
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2020-04-07 23:07:24 -05:00 |
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a4ca210798
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Backend/a64: Fix asset when falling back to interpreter
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2020-04-07 23:07:24 -05:00 |
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ea2c98a7c3
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backend\A64\emit_a64_packed.cpp: Implement Packed Halving Add/Sub instructions
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2020-04-07 23:07:24 -05:00 |
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93c946dfb3
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backend\A64\emit_a64_packed.cpp: Implement Packed Saturating instructions
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2020-04-07 23:07:24 -05:00 |
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backend\A64\emit_a64_packed.cpp: Implement SignedPacked*- ADD and SUB
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2020-04-07 23:07:24 -05:00 |
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0f00a1a00b
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a64 emitter: Vector Halving and Saturation instructions
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2020-04-07 23:07:24 -05:00 |
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d2847a202e
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backend\A64\emit_a64_packed.cpp: Implement UnsignedPacked*- ADD and SUB...
with few other in the emitter
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2020-04-07 23:07:24 -05:00 |
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5550e6f157
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a64 emitter: fix Scalar Saturating Instructions
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2020-04-07 23:07:24 -05:00 |
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5d6242ac46
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A64 Emitter: Implement Saturating Add and Sub
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2020-04-07 23:07:24 -05:00 |
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5e55e8297f
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backend\A64\emit_a64_data_processing.cpp: Implement Division
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2020-04-07 23:07:24 -05:00 |
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d6f0b3532f
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backend\A64\emit_a64_data_processing.cpp: Implement 64bit CLZ
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2020-04-07 23:07:24 -05:00 |
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b9c6a99cf5
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backend\A64\emit_a64_data_processing.cpp: Implement 64bit LSL and ROR Instructions
Also EmitTestBit
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2020-04-07 23:07:24 -05:00 |
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2ff25d4fbb
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backend\A64\emit_a64_data_processing.cpp: Implement 64bit Logical Instructions
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2020-04-07 23:07:24 -05:00 |
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f33a51cb09
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backend/a64: implememnt CheckBit
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2020-04-07 23:07:23 -05:00 |
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2dc985237b
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backend/a64: Redesign Const Pool
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2020-04-07 23:07:23 -05:00 |
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66978a9fb7
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backend\A64\emit_a64_floating_point.cpp: Fix include paths
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2020-04-07 23:07:23 -05:00 |
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5af7146374
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backend\A64\a32_emit_a64.cpp: Fix Coproc* after rebase
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2020-04-07 23:07:23 -05:00 |
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backend/a64/opcodes.inc: Coproc instructions
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2020-04-07 23:07:23 -05:00 |
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49dce5c8fa
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a64 emitter: Fix LDR literal
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2020-04-07 23:07:23 -05:00 |
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ec41144951
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a64 emitter: Move IsInRange* and MaskImm* into anon namespace
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2020-04-07 23:07:23 -05:00 |
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