MerryMage
a84a746831
A64: Add options for detecting misaligned loads and stores
2020-03-31 14:45:04 +01:00
Markus Wick
f2c7c6a0d0
A64/x64: Create a global_offset optimization for the page table.
...
Instead of looking up the page table like:
table[addr >> 12][addr & 0xFFF]
We can use a global offset on the table to query the memory like:
table[addr >> 12][addr]
This saves two instructions on *every* memory access within the recompiler.
Thanks at skmp for the idea.
2019-12-31 00:08:35 +01:00
MerryMage
e814b47812
A64: Add hook_hint_instructions option
2019-07-25 12:15:54 +01:00
Lioncash
2bc8a095dd
General: Correct typos is code comments
2019-05-24 01:37:03 -04:00
Lioncash
ae7aa581b8
A32: Implement the ARM-mode variant of SEVL
2019-05-03 16:16:07 -04:00
Lioncash
fdde4ca363
A64: Implement BRK
...
Currently, we can just implement this as part of the exception
interface, similar to how it's done for the A32 interface with BKPT.
2018-09-19 07:09:27 +01:00
MerryMage
959446573f
A64: Implement FastDispatchHint
2018-09-07 22:07:44 +01:00
MerryMage
0b69381ff4
A64/translate: Allow for unpredictable behaviour to be defined
2018-08-16 09:59:06 +01:00
MerryMage
6d236d459f
system: Implement MRS CNTFRQ_EL0
2018-08-16 09:58:34 +01:00
MerryMage
f915f0860c
Implement global exclusive monitor
2018-06-05 12:27:37 +01:00
Lioncash
b00f6d1044
Correct typo in DataCacheOperation enum
...
Fixes a typo for the InvalidateByVAToPoC enum entry. Given yuzu is the
only known user of 64-bit mode and it doesn't use this value, we can get
away with changing this.
2018-05-14 15:39:08 +01:00
MerryMage
b2d781da3a
system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
2018-02-20 20:31:56 +00:00
MerryMage
747968416f
A64: Implement system register TPIDR_EL0
2018-02-20 17:56:20 +00:00
MerryMage
31e370cdf4
A64: Implement system register CNTPCT_EL0
2018-02-20 16:56:05 +00:00
MerryMage
9a88fd3340
A64: Implement system register CTR_EL0
2018-02-20 16:44:13 +00:00
MerryMage
9605f28792
a64/config: Allow NaN emulation accuracy to be set
2018-02-18 13:18:22 +00:00
MerryMage
49f1de3188
Direct Page Table Access: Handle address spaces less than the full 64-bit in size
2018-02-12 21:26:23 +00:00
MerryMage
406725e533
Implement direct page table access
2018-02-12 20:51:03 +00:00
MerryMage
7a161ed35c
A64: Partially implement MRS
2018-02-12 00:06:44 +00:00
MerryMage
1ba2642742
Implement DC instructions
2018-02-11 23:12:28 +00:00
MerryMage
d6589fe3ee
IR: Add IR instructions A64Memory{Read,Write}128
...
This implementation only works on macOS and Linux.
2018-01-24 16:18:58 +00:00
MerryMage
ed63cc7ae9
interface: Move Vector typedef to config.h
2018-01-24 16:18:58 +00:00
MerryMage
9ab130490b
A64: Add ExceptionRaised IR instruction
...
The purpose of this instruction is to raise exceptions when certain decode-time
issues happen, instead of asserting at translate time. This allows us to
use the translator for code analysis without worrying about unnecessary asserts,
but also provides flexibility for the library user to perform custom behaviour
when one of these states are raised.
2018-01-13 18:06:06 +00:00
MerryMage
ef6fd92fed
A64: Backend framework
2018-01-09 18:57:06 +00:00
