SachinVin
|
f671e1ef4d
|
backend/A64: Use ScratchGpr() instead of ABI_SCRATCH1 where possible
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
743aa2385e
|
backend/A64: support for always_little_endian
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
a11111bcde
|
backend/a64: Add hook_hint_instructions option
534eb0f
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
2d5b21ecc2
|
backend /A64: cleanup
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
23d30423d7
|
gitignore: add .vs dir
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
962a359ec4
|
Minor style fix
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
b883dbe240
|
backend\A64\emit_a64_packed.cpp: Implement AddSub halving and non halving
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
6adc894ffd
|
backend\A64: Instructions that got implemented on the way
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
93a183de02
|
backend\A64\emit_a64_packed.cpp: Implement Unsigned Sum of Absolute Differences
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
e3b8eb1735
|
a64 emitter: Absolute Difference and add across vector instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
664914d141
|
backend\A64\emit_a64_packed.cpp: Implement Packed Select
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
a4ca210798
|
Backend/a64: Fix asset when falling back to interpreter
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
ea2c98a7c3
|
backend\A64\emit_a64_packed.cpp: Implement Packed Halving Add/Sub instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
93c946dfb3
|
backend\A64\emit_a64_packed.cpp: Implement Packed Saturating instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
d3c4ffbdc8
|
backend\A64\emit_a64_packed.cpp: Implement SignedPacked*- ADD and SUB
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
0f00a1a00b
|
a64 emitter: Vector Halving and Saturation instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
d2847a202e
|
backend\A64\emit_a64_packed.cpp: Implement UnsignedPacked*- ADD and SUB...
with few other in the emitter
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
5550e6f157
|
a64 emitter: fix Scalar Saturating Instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
5d6242ac46
|
A64 Emitter: Implement Saturating Add and Sub
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
5e55e8297f
|
backend\A64\emit_a64_data_processing.cpp: Implement Division
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
d6f0b3532f
|
backend\A64\emit_a64_data_processing.cpp: Implement 64bit CLZ
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
b9c6a99cf5
|
backend\A64\emit_a64_data_processing.cpp: Implement 64bit LSL and ROR Instructions
Also EmitTestBit
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
2ff25d4fbb
|
backend\A64\emit_a64_data_processing.cpp: Implement 64bit Logical Instructions
|
2020-04-07 23:07:24 -05:00 |
|
SachinVin
|
f33a51cb09
|
backend/a64: implememnt CheckBit
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
2dc985237b
|
backend/a64: Redesign Const Pool
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
66978a9fb7
|
backend\A64\emit_a64_floating_point.cpp: Fix include paths
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
5af7146374
|
backend\A64\a32_emit_a64.cpp: Fix Coproc* after rebase
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
0fbb8a5a73
|
backend/a64/opcodes.inc: Coproc instructions
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
49dce5c8fa
|
a64 emitter: Fix LDR literal
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
ec41144951
|
a64 emitter: Move IsInRange* and MaskImm* into anon namespace
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
d309b0a917
|
backend\A64\emit_a64_floating_point.cpp: Implement VADD VSUB VMUL and other stuff
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
ee981d64ea
|
backend\A64\emit_a64_floating_point.cpp: Implement VABS VNEG VCMP and a few others
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
a44e2cbdd0
|
frontend/A32/Decoder : (backend/a64)VMOV
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
f9696def84
|
backend\A64\emit_a64_floating_point.cpp: Implement VCVT instructions
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
b947f47c3f
|
backend\A64\emit_a64_floating_point.cpp: part 1
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
e761af6a6c
|
backend/a64/reg_alloc: Fix EmitMove for FPRs
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
49407c1b0b
|
A64 emitter: Support for 64bit FMOV
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
1025f8b24c
|
a64 backend: Load "guest_FPSR"
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
701b851964
|
A64 backend: Add Get/SetExtendedRegister and Get/SetGEFlags
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
3ad30f2de3
|
tests: Dont compile A64 tests for non x64 backend
|
2020-04-07 23:07:23 -05:00 |
|
SachinVin
|
f22f1a8a92
|
travis a64: unicorn
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
4ebf381ece
|
travis a64 backend
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
0d2213bb41
|
Frontend/A32: a64 backend; Interpret SEL
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
c2a47d98b8
|
frontend/A32: A64 Backend implemented instructions
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
944b31a2fd
|
backend\A64\emit_a64_data_processing.cpp: Implement REV and CLZ ops
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
fa1dca005f
|
backend\A64\emit_a64_data_processing.cpp: Implement Sext an Zext ops
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
5ef6c28cb5
|
backend\A64\emit_a64_data_processing.cpp: Implement Logical ops
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
6008e63a4b
|
backend\A64\emit_a64_data_processing.cpp: Implement Arithmetic ops
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
41ca83102e
|
backend\A64\emit_a64_data_processing.cpp: Implement Shift and Rotate ops
|
2020-04-07 23:07:03 -05:00 |
|
SachinVin
|
5af0945b6d
|
backend\A64\emit_a64_data_processing.cpp:Implement ops
|
2020-04-07 23:07:03 -05:00 |
|