backend/A64: Implement AndNot32
fix AndNot32
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ef03b3f16c
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40db85e783
@ -911,6 +911,15 @@ void EmitA64::EmitAnd64(EmitContext& ctx, IR::Inst* inst) {
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void EmitA64::EmitAndNot32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Arm64Gen::ARM64Reg op_a = EncodeRegTo32(ctx.reg_alloc.UseGpr(args[0]));
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Arm64Gen::ARM64Reg result = EncodeRegTo32(ctx.reg_alloc.UseScratchGpr(args[1]));
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code.BIC(result, op_a, result);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void EmitA64::EmitEor32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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@ -136,7 +136,7 @@ OPCODE(SignedDiv32, U32, U32,
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OPCODE(SignedDiv64, U64, U64, U64 )
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OPCODE(And32, U32, U32, U32 )
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OPCODE(And64, U64, U64, U64 )
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//OPCODE(AndNot32, U32, U32, U32 )
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OPCODE(AndNot32, U32, U32, U32 )
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//OPCODE(AndNot64, U64, U64, U64 )
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OPCODE(Eor32, U32, U32, U32 )
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OPCODE(Eor64, U64, U64, U64 )
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