backend/A64: clear upper 32bits for PackedAbsDiffSumS8 test case
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@ -450,6 +450,7 @@ void EmitA64::EmitPackedAbsDiffSumS8(EmitContext& ctx, IR::Inst* inst) {
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const ARM64Reg b = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[1]));
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const ARM64Reg b = EncodeRegToDouble(ctx.reg_alloc.UseFpr(args[1]));
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code.fp_emitter.UABD(B, a, a, b);
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code.fp_emitter.UABD(B, a, a, b);
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code.fp_emitter.FMOV(EncodeRegToSingle(a), a);
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code.fp_emitter.UADDLV(B, a, a);
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code.fp_emitter.UADDLV(B, a, a);
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ctx.reg_alloc.DefineValue(inst, a);
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ctx.reg_alloc.DefineValue(inst, a);
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