1865 Commits

Author SHA1 Message Date
Lioncash
065143b395
frontend/ir_emitter: Add half-precision opcode for FPRecipStepFused 2019-04-14 06:14:18 -04:00
Lioncash
408bbfb766
common/fp/op: Add half-precision specialization for FPRecipStepFused 2019-04-14 06:13:43 -04:00
Merry
5ae8e4e043
Merge pull request #476 from lioncash/frint
A64: Handle half-precision variants of FRINT* instructions
2019-04-14 10:57:09 +01:00
Lioncash
f8fb10289a
A64: Enable half-precision vector FRINT* variants 2019-04-13 18:05:00 -04:00
Lioncash
7c5cc15f4e
A64: Enable half-precision variants of floating-point FRINT* variants
With all the backing machinery in place, we can remove the fallback
check for half-precision.
2019-04-13 17:54:36 -04:00
Lioncash
95a96b32c5
frontend/microinstruction: Add FPVectorRoundInt types to ReadsFromAndWritesToFPSRCumulativeExceptionBits()
All variants were previously missing from this.
2019-04-13 17:51:13 -04:00
Lioncash
722daae0d4
frontend/ir_emitter: Add half-precision variant of FPVectorRoundInt 2019-04-13 17:49:04 -04:00
Lioncash
8243705134
frontend/ir_emitter: Add half-precision variant of FPRoundInt 2019-04-13 17:44:37 -04:00
Lioncash
590388b9ec
fp/op/FPRoundInt: Add half-precision specialization of FPRoundInt 2019-04-13 17:37:45 -04:00
Merry
b34f42575d
Merge pull request #475 from lioncash/muladd
A64: Enable half-precision variants of floating-point multiply-add instructions
2019-04-13 14:30:03 +01:00
Merry
2218912292
A64/location_descriptor: Ensure FZ16 is included in the FPCR mask 2019-04-13 08:05:04 -04:00
Merry
9faf1bdfd4
Merge pull request #474 from lioncash/bracing
load_store_*: Make bracing consistent and variables const where applicable
2019-04-13 10:53:21 +01:00
Merry
5f351a669c
Merge pull request #473 from lioncash/sqshlu
A64: Implement SQSHLU
2019-04-13 08:31:17 +01:00
Lioncash
a935f35553
A64: Implement FMLA/FMLS' half-precision vector indexed variants 2019-04-13 02:19:06 -04:00
Lioncash
caaa04cba1
A64: Implement FMLA/FMLS' half-precision scalar indexed variants 2019-04-13 02:11:44 -04:00
Lioncash
894169dc7a
A64: Implement half-precision vector variants of FMLA/FMLS 2019-04-13 01:48:22 -04:00
Lioncash
278c7ae744
ir/frontend: Add half-precision opcode for FPVectorMulAdd 2019-04-13 01:42:35 -04:00
Lioncash
0eb6412c4d
A64: Enable half-precision floating point variants of FP data-processing three register instructions
This handles half-precision floating point for:

- FMADD
- FMSUB
- FNMADD
- FNMSUB
2019-04-13 01:35:32 -04:00
Lioncash
13b41525cb
frontend/ir_emitter: Add half-precision opcode for FPMulAdd 2019-04-13 00:18:09 -04:00
Lioncash
2ae0c4807a
fp/op/FPMulAdd: Add half-precision floating-point specialization 2019-04-13 00:07:34 -04:00
Lioncash
94ac9becda
load_store_*: Make bracing consistent and variables const where applicable
Makes bracing consistent, and variables const where applicable to be
consistent with the rest of the codebase.

In most bracing cases, they'd need to be added to conditionals that
would involve checking stack pointer alignment in the future anyways.
2019-04-12 23:51:36 -04:00
Lioncash
be3fc0f9ff
A64: Implement SQSHLU's scalar variant 2019-04-12 19:49:33 -04:00
Lioncash
508c77c3ee
A64: Implement SQSHLU's vector variant
The vector shift by immediate category is now fully implemented.
2019-04-12 19:45:20 -04:00
Lioncash
31867874de
frontend/ir_emitter: Add opcodes for signed saturated left shifts with unsigned saturation 2019-04-12 19:44:23 -04:00
Merry
5e77d110cc
Merge pull request #472 from lioncash/exception
general: Mark hash functions as noexcept
2019-04-12 21:33:47 +01:00
Merry
ed8c218076
Merge pull request #471 from lioncash/sqrdmulh
A64: Implement SQRDMULH's scalar vector variant
2019-04-12 20:29:22 +01:00
Lioncash
57629276c1
general: Mark hash functions as noexcept
Generally hash functions shouldn't throw exceptions. It's also a
requirement for the standard library-provided hash functions to not
throw exceptions.

An exception to this rule is made for user-defined specializations,
however we can just be consistent with the standard library on this to
allow it to play nicer with it.

While we're at it, we can also make the std::less specializations
noexcpet as well, since they also can't throw.
2019-04-12 15:27:28 -04:00
Merry
c963996e0b
Merge pull request #470 from lioncash/assert
general: Replace unreachable-imitating assertions with UNREACHABLE()
2019-04-12 20:14:18 +01:00
Merry
8ac3fb8df3
Merge pull request #469 from lioncash/void
A64/impl: Reorganize peculiar void use in V_scalar
2019-04-12 20:13:57 +01:00
Lioncash
f58406333a
A64: Implement SQRDMULH's scalar vector variant
Implements the scalar variant in terms of the vector variant for the
time being.
2019-04-12 15:05:53 -04:00
Lioncash
a5ca872208
general: Replace unreachable-imitating assertions with UNREACHABLE()
We can just use the self-documenting assertion for indicating
unreachable paths, instead of manually passing false and providing a
message.
2019-04-12 14:51:43 -04:00
Lioncash
d75af9d0e1
A64/impl: Reorganize peculiar void use in V_scalar
To a reader this might look particularly strange, given the function
itself has a void return value, but this is actually valid, given the
function in the return statement also has a void return value.

This instead alters it to be a little easier to parse and potentially be
a little less confusing at a glance.
2019-04-12 14:44:16 -04:00
Merry
4ed7009f24
Merge pull request #468 from lioncash/const
ir_opt: Mark locals as const where applicable
2019-04-12 19:15:32 +01:00
Merry
25039d02ff
Merge pull request #467 from lioncash/reserved
A64: Handle reserved instruction cases more specifically where applicable
2019-04-12 19:13:08 +01:00
Merry
5fdbb46008
Merge pull request #466 from lioncash/fcmla
A64: Implement FCMLA's indexed element variant
2019-04-12 08:15:05 +01:00
Lioncash
e244bf4f68
ir_opt/verification_pass: Mark locals as const where applicable
Makes our immutable state a little more explicit.
2019-04-11 18:30:30 -04:00
Lioncash
d02eef2fac
ir_opt/a64_callback_config_pass: Mark locals as const where applicable
Makes our immutable state a little more explicit.
2019-04-11 18:28:11 -04:00
Lioncash
38977fac33
ir_opt/a32_get_set_elimination_pass: Mark local variables as const where applicable
Makes our intended immutable state slightly more explicit.
2019-04-11 18:26:13 -04:00
Lioncash
e299e92698
ir_opt/a32_constant_memory_reads_pass: Apply const where applicable to locals
Makes immutable state just slightly more explicit.
2019-04-11 18:18:32 -04:00
Lioncash
0dca81d20f
A64: Handle reserved instruction cases more specifically where applicable
These are cases that are defined as reserved within the ARMv8 reference
manual, so we can handle them as such instead of as unallocated
encodings.

While this doesn't actually change emulated behavior, it does at least
allow the JIT to generate the more appropriate exception.
2019-04-11 17:47:28 -04:00
Lioncash
06e7e9fbef
A64: Implement FCMLA's indexed element variant
With this, all of the instructions introduced with ARMv8.3-CompNum have
an implementation.
2019-04-11 17:20:06 -04:00
Merry
c635591355
Merge pull request #465 from neobrain/master
CMakeLists: Allow importing dynarmic build trees into other CMake projects
2019-04-11 22:00:46 +01:00
Merry
3a2fc56e81
Merge pull request #464 from lioncash/uqshl
A64: Implement UQSHL (immediate)'s scalar variant
2019-04-11 21:29:03 +01:00
Tony Wasserka
fd4fa20834 CMakeLists: Allow importing dynarmic build trees into other CMake projects 2019-04-11 18:04:57 +02:00
Lioncash
b7a76d6967
simd_scalar_shift_by_immediate: Change UnallocatedEncoding() path in SaturatingShiftLeft to ReservedValue()
Strictly speaking, immh being zero is defined as reserved in the ARMv8
reference manual. This was just an error on my part when introducing the
SQSHL immediate scalar variant.
2019-04-10 15:20:11 -04:00
Lioncash
2769572231
A64: Implement UQSHL (immediate)'s scalar variant
Like SQSHL's immediate scalar variant, we can also implement UQSHL's
immediate scalar variant in terms of the vector variant for the time
being.
2019-04-10 15:12:57 -04:00
Lioncash
24479ecbe5
simd_scalar_shift_by_immediate: Migrate SQSHL implementation to file-scope function
This will allow it to be reused for the implementation of UQSHL.
2019-04-10 15:10:32 -04:00
Merry
2483b6b0dc
Merge pull request #463 from lioncash/sqshl
A64: Implement scalar variant of SQSHL (immediate)
2019-04-10 14:12:52 +01:00
Lioncash
fc729bee8c
A64: Implement scalar variant of SQSHL (immediate)
This can be handled in terms of the vector variant for the time being.
2019-04-09 10:13:14 -04:00
MerryMage
0bcc47a71c README: Update README 2019-04-06 10:56:21 +01:00