2025 Commits

Author SHA1 Message Date
MerryMage
3d2c511928 travis: Test on GCC 8 2019-05-08 22:41:01 +01:00
MerryMage
9f1233a236 CMakeLists: Define FMT_USE_USER_DEFINED_LITERALS=0
This disable a fmtlib feature that depends on a non-standard feature
for its implementation.
2019-05-08 22:18:56 +01:00
Lioncash
2683a9a3e3
Revert "CMakeLists: Handle DYNARMIC_NO_BUNDLED_FMT in relation to export()"
I was being silly. This isn't required.

This reverts commit 00b79cbb72c61744470e0aa1a96b673702b33931.
2019-05-07 03:17:43 -04:00
Lioncash
00b79cbb72
CMakeLists: Handle DYNARMIC_NO_BUNDLED_FMT in relation to export()
This is pretty gross, but until DYNARMIC_NO_BUNDLED_FMT is eliminated,
this fixes the use of it in existing libraries or applications making
use of dynarmic.
2019-05-06 14:29:36 -04:00
MerryMage
11fab29834 A32/translate_thumb: Split off implementation into thumb16 and thumb32 2019-05-06 17:48:27 +01:00
MerryMage
8434f748e4 A32/translate: Rename translate_arm directory to impl
Mirror what the A64 frontend does.
2019-05-06 17:31:00 +01:00
MerryMage
3af0bdc381 Add .gitignore 2019-05-06 12:10:25 +01:00
MerryMage
69c7e77953 travis: Rename test-a64 to test-with-unicorn
Also remove [a64] filter so that the A32 frontend is exercised as well.
2019-05-06 00:49:01 +01:00
MerryMage
291b237f96 A32/location_descriptor: Add CPSR.IT to A32::LocationDescriptor 2019-05-06 00:28:45 +01:00
MerryMage
bacabcd39c PSR: Use Common::ModifyBit{,s} 2019-05-05 23:50:34 +01:00
MerryMage
94632525e0 A32: Add ITState 2019-05-05 23:50:31 +01:00
MerryMage
b6e8297e36 a32_jitstate: Optimize runtime location descriptor calculation
Calculation is now one unaligned 64-bit load.
2019-05-05 23:24:57 +01:00
MerryMage
205e60273c a32_jitstate: Remove fpsr_idc
We do not really have accurate FPSR state in any case.
2019-05-05 23:19:08 +01:00
MerryMage
e5e8036917 {a32,a64}_jitstate: Rename CPSR_* to cpsr_* 2019-05-05 19:49:54 +01:00
MerryMage
ddd5699a83 a32_jitstate: Remove old_FPSCR 2019-05-05 19:47:38 +01:00
MerryMage
0aae9ea07c a32_jitstate: Rename FPSCR_nzcv to fpsr_nzcv 2019-05-05 19:46:57 +01:00
MerryMage
8dc9aec9db a32_jitstate: Rename FPSCR_mode to fpcr_mode 2019-05-05 19:45:45 +01:00
MerryMage
0fb12df549 {a32,a64}_jitstate: Rename FPSCR_IDC to fpsr_idc 2019-05-05 19:44:12 +01:00
MerryMage
33715d2a97 {a32,a64}_jitstate: Remove FPSCR_UFC 2019-05-05 19:42:17 +01:00
MerryMage
0f20a56fe9 a32_jitstate: Enable SSE FTZ and DAZ 2019-05-05 19:40:14 +01:00
MerryMage
852591ff37 a32_jitstate: Remove exception trap enables from FPSCR_MODE_MASK
We don't currently use this for anything (we do not currently trap
floating point exceptions).

This frees these bits up for other purposes.
2019-05-05 19:38:55 +01:00
Merry
c3d20e4ebf
Merge pull request #500 from lioncash/cbz
A32: Implement Thumb-1's CBZ/CBNZ instructions
2019-05-05 18:48:13 +01:00
MerryMage
0cca95d9eb tests: Fix Windows build when DYNARMIC_TESTS_USE_UNICORN is enabled 2019-05-05 18:43:58 +01:00
Merry
766f368f7b
Merge pull request #498 from lioncash/ahp
A32/location_descriptor: Add AHP bit to the FPSCR mask
2019-05-05 11:50:37 +01:00
Lioncash
4a7d62d528
common/fp/info: Make formatting of FPInfo struct member functions consistent
Orgranizes the functions to all be consistent with the half-precision
specialization.
2019-05-04 21:24:18 -04:00
Lioncash
3991361352
common/fp/util: Make ProcessNaN utility functions constexpr
Nothing in particular prevents these from being constexpr. Do so to make
them consistent with the bulk of other functions in this header that are
constexpr.
2019-05-04 21:20:43 -04:00
Lioncash
4cfd1f28cc
common/fp/op/FPNeg: Make FPNeg constexpr
Negation in (standard IEEE) floating-point is simply flipping the sign-bit, so this
operation will never be more complex than what is presented here, making
constexpr a reasonable allowance.
2019-05-04 21:07:49 -04:00
Lioncash
75fd25b2ec
CMakeLists: Add FPNeg.h to the library target sources
Ensures that the header shows up in IDE generated projects.
2019-05-04 21:05:51 -04:00
Lioncash
94717dc11a
general: Remove trailing spaces
General code-related cleanup. Gets rid of trailing spaces in the
codebase.
2019-05-04 21:03:34 -04:00
Lioncash
0085c21321
x64/reg_alloc: Remove reference qualifier to variable in GetArgumentInfo()
The result of GetArg() is returned by value, so this is essentially
still a copy. While the previous code *is* valid, this communicates what
is actually happening a little more explicitly.
2019-05-04 19:15:19 -04:00
Lioncash
f8814e7e05
ir_opt/verification_pass: Add include for std::puts
Ensures that the header dependency is always satisfied directly, and not
through other project headers. While we're at it, we can qualify the
call with the std:: namespace.
2019-05-04 19:10:05 -04:00
Lioncash
bd0ed7ee79
ir_opt/verification_pass: Eliminate redundant GetArg()
Given the same argument is used inside the condition's body if it's
true, we can just utilize the local to cut out a GetArg() operation.
Avoids redundant internal assertion checking.
2019-05-04 19:07:45 -04:00
Merry
161f0ba2fa
Merge pull request #499 from lioncash/movw
A32: Implement ARM-mode MOVW
2019-05-04 16:53:01 +01:00
Merry
ff75a409b6
Merge pull request #497 from lioncash/boost
A32/coprocessor: Remove boost from public interface
2019-05-04 16:52:24 +01:00
Lioncash
f0f9fd1065
CMakeLists: Specify the /volatile flag with standard-conforming semantics
Makes Windows builds more standard-compliant. Given we currently make no
use of volatile, and the libraries we currently use don't use it any
meaningful way, this is safe to specify without worrying.
2019-05-04 00:46:25 -04:00
Lioncash
6f7fbb31a1
CMakeLists: Add /Zc:externConstexpr compilation flag
Improves standard conformance on Windows builds.
2019-05-04 00:40:12 -04:00
Lioncash
c65ea6a92d
CMakeLists: Remove setting of CMAKE_WARN_DEPRECATED
CMake documentation states:
    "If this variable is not set, CMake behaves as if it were set to TRUE."

So this isn't needed, as it's the default behavior.
2019-05-04 00:17:29 -04:00
Lioncash
d56ed7e513
CMakeLists: Turn generic target path into an error
There's currently no way this path can occur and result in any
functioning executable. The recompiler backends are platform-specific.
If those platforms aren't available, then it's quite literally
impossible to use this library for anything meaningful. Instead of
defining a generic architecture and continuing on, notify the developer
that their platform is not currently supported.
2019-05-04 00:10:46 -04:00
Lioncash
13c3f25ac5
CMakeLists: Remove detection of 32-bit platforms
We currently have no plans to add 32-bit host architecture support, so
we don't even need to check for these platforms.
2019-05-04 00:04:15 -04:00
Lioncash
2f8167a3e0
block_of_code: Use variable template variants of type traits
Now all type traits are using the variable template variants where
applicable.
2019-05-03 22:55:50 -04:00
Lioncash
9d9ba745db
dynarmic_tests: Use variable template equivalents of type traits where applicable
Same thing, same readability, less writing.
2019-05-03 22:44:38 -04:00
Lioncash
835f490765
frontend/decoder/decoder_detail: Replace std::is_same, with std::is_same_v
Same thing, same readability, less characters.
2019-05-03 22:41:53 -04:00
Lioncash
fb95482a85
A32: Implement Thumb-1's CBZ/CBNZ instructions
Introduced in ARMv6T2, this allows for short forward branches.
2019-05-03 19:29:08 -04:00
Lioncash
80320bfed0
frontend/ir/ir_emitter: Add A32 equivalent to A64's SetCheckBit
This will be used in a subsequent change to implement ARMv6T2's CBZ/CBNZ
Thumb-1 instructions.
2019-05-03 19:13:21 -04:00
Lioncash
17f6494432
A32: Implement ARM-mode MOVW
Introduced to the ISA in ARMv6T2
2019-05-03 18:00:54 -04:00
Lioncash
19f21d0be2
travis: Bump macOS deployment version to 10.14
Some of std::variant's functions are only available in 10.14 and later.
2019-05-03 16:36:58 -04:00
Merry
c3b92ed7ee
Merge pull request #496 from lioncash/thumb-hint
A32: Implement Thumb-1 hint instructions
2019-05-03 21:22:37 +01:00
Lioncash
64ffdb6d14
A32: Implement Thumb-1 variant of SEVL
While we're at it, also add the Thumb-2 encoding to the encoding table
to make sure it isn't forgotten about in the future.
2019-05-03 16:16:07 -04:00
Lioncash
ae7aa581b8
A32: Implement the ARM-mode variant of SEVL 2019-05-03 16:16:07 -04:00
Lioncash
245d41ac93
A32: Implement Thumb-1 variant of YIELD 2019-05-03 16:15:11 -04:00