829 Commits

Author SHA1 Message Date
MerryMage
e5ce22aabc A64: Implement STR{,B,H} (register), LDR{,B,H,SB,SH,SW} (register), PFRM (register) 2018-02-04 12:49:40 +00:00
Lioncash
dc9317f714 Common: Put AES code within its own nested namespace
Prevents the functions from potentially clashing with other stuff in Common in the future
2018-02-03 23:11:46 +00:00
Lioncash
ccf9493653 A64: Implement AESD 2018-02-03 23:11:46 +00:00
Lioncash
33bc59c55a A64: Implement AESE 2018-02-03 23:11:46 +00:00
MerryMage
db6999fc38 backend_x64: Use a reference to BlockOfCode instead of a pointer 2018-02-03 14:28:57 +00:00
MerryMage
a7209dc2f7 IR: Add IR instruction NZCVFromPackedFlags
This instruction expects NZCV to be in the high bits.
i.e.: The positions they were in PSTATE.
2018-02-03 13:41:36 +00:00
MerryMage
2262b08a04 A64: Implement INS (general) 2018-02-03 13:07:00 +00:00
MerryMage
3c140141db A64: Implement INS (element) 2018-02-03 13:03:50 +00:00
MerryMage
af5fb0a1a0 A64: Implement SMOV 2018-02-03 12:58:19 +00:00
MerryMage
818b9a4673 A64: Implement UMOV 2018-02-03 12:55:53 +00:00
MerryMage
9ea219e010 basic_block: Fix bogus GCC maybe-uninitialized warning 2018-02-03 03:04:44 +00:00
MerryMage
64e37de179 A64: Implement FCVT 2018-02-03 01:23:11 +00:00
MerryMage
f1d2cdde34 fuzz_with_unicorn: Skip instructions that need to be interpreted 2018-02-03 01:22:40 +00:00
MerryMage
2fd70e56ce A64: Implement FMOV (scalar, immediate) 2018-02-03 00:52:48 +00:00
MerryMage
567c1b57fc A64: Implement STUR (SIMD&FP), LDUR (SIMD&FP) 2018-02-02 22:39:24 +00:00
MerryMage
c42ca435ba A64: Implement FCMP, FCMPE 2018-02-02 22:25:51 +00:00
MerryMage
0131a87c43 a64_jitstate: A64 does not have a seperate FPSCR.NZCV 2018-02-02 22:25:18 +00:00
MerryMage
4728257d4e A64: Implement FMUL (scalar), FDIV (scalar), FADD (scalar), FSUB (scalar), FNMUL (scalar) 2018-02-02 22:04:09 +00:00
MerryMage
fcabd95ad0 IR: Merge U32 and U64 variants of FP instructions 2018-02-02 21:55:23 +00:00
MerryMage
6d9adb668e A64: Implement {ST,LD}{1,2,3,4} (multiple structures) 2018-02-02 21:10:30 +00:00
MerryMage
bfeb9ff617 emit_x64_vector: bug: VectorGetElement8 returning incorrect values for non-SSE4.1
This bug wasn't discovered earlier because we previously only used index == 0.
2018-02-02 21:07:00 +00:00
MerryMage
cc40b83ed0 IR: Implement VectorSetElement{8,16,32,64} 2018-02-02 21:00:12 +00:00
Lioncash
b608979be9 A64: Implement AESIMC and AESMC 2018-02-02 17:35:16 +00:00
Lioncash
58598e2e15 iterator_util: Make Reverse constexpr
C++17 makes non-member rbegin(), rend(), crbegin(), and crend() constexpr, allowing this to also be constexpr.
2018-01-31 18:09:15 +00:00
Lioncash
c9da41884c Common: Relocate common bits of CRC32
Allows the algorithm to be used in any other potential backend.
2018-01-30 07:57:29 +00:00
Lioncash
7fb386aa1c A64: Implement CRC32 2018-01-29 17:06:17 +00:00
MerryMage
64157d34cf travis: Bump MACOSX_DEPLOYMENT_TARGET 2018-01-29 17:05:50 +00:00
MerryMage
65078d5b18 fuzz_with_unicorn: Print information on test failure 2018-01-28 22:33:34 +00:00
MerryMage
4cc2cecaff scope_exit: Add SCOPE_SUCCESS and SCOPE_EXIT 2018-01-28 18:03:58 +00:00
MerryMage
607b9c8c62 A64: Add Disassemble method 2018-01-28 18:03:57 +00:00
MerryMage
e0ab098473 A32: data_processing: Remove !S assertions 2018-01-28 12:59:52 +00:00
MerryMage
b96014b3b2 A32: Implement BKPT 2018-01-28 12:59:52 +00:00
MerryMage
14910e53d3 A32: Add ExceptionRaised IR instruction and use it 2018-01-28 12:59:52 +00:00
Lioncash
0216cbd2a5 A64: Implement CRC32C 2018-01-28 12:20:56 +00:00
MerryMage
2e14326fd5 assert: Use fmt in ASSERT_MSG 2018-01-28 00:00:58 +00:00
Lioncash
7a96daa715 externals: Update catch to v2.1.1
Brings in a few minor improvements like proper stringification of static arrays.
2018-01-27 22:54:22 +00:00
Lioncash
7f31a9b5ab fuzz_with_unicorn: Move data outside loop
Given we know we're only ever going to use one instruction, we can just presize the vector and reassign to it
instead of potentially reallocating the same memory 100000 times
2018-01-27 22:54:01 +00:00
Lioncash
763a4783f9 fuzz_with_unicorn: Dehardcode some constants 2018-01-27 22:54:01 +00:00
MerryMage
1f06ca80d4 a64_emit_x64: Perform RSB predictions 2018-01-27 22:48:08 +00:00
MerryMage
3f6889f700 A32: Change UserCallbacks to be similar to A64's interface 2018-01-27 22:45:48 +00:00
Lioncash
4798a40908 reg_alloc: std::move RegAlloc's function argument 2018-01-27 02:52:59 +00:00
Lioncash
c40e7acc8e General: Add missing override specifiers 2018-01-27 02:46:04 +00:00
MerryMage
e111309aba EmitZeroExtendLongToQuad: Do not rely on register allocator to zero extend 64->128 2018-01-27 02:00:49 +00:00
MerryMage
a1018a4eea a64_get_set_elimination_pass: Simplify algorithm 2018-01-27 02:00:49 +00:00
MerryMage
ac1f4d3d5d a64_emit_x64: bug: x64 sign-extends 32-bit immediates 2018-01-27 00:38:43 +00:00
MerryMage
9232be5553 ir_opt: Add A64 Get/Set Elimination Pass 2018-01-27 00:38:43 +00:00
MerryMage
39b7625e9d ir_emitter: Allow the insertion point for new instructions to be set 2018-01-27 00:38:43 +00:00
MerryMage
68c5399607 {a32,a64}_interface: Predict entrypoint 2018-01-27 00:38:42 +00:00
Lioncash
dbddb4858a A64: Implement EXTR 2018-01-26 22:07:48 +00:00
MerryMage
0dc584a62d externals: Update xbyak to v5.601
Merge commit '43330ec3ba6dae3829675874258bdd717d0f3f19'
2018-01-26 18:39:45 +00:00