Vitor Kiguchi
2b3be5eee8
enable DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT by default on apple silicon
2021-05-04 13:01:19 -03:00
Vitor Kiguchi
94d1f7c01a
Simplify apple silicon changes
2021-05-04 03:23:50 -03:00
Vitor Kiguchi
ad315fd20d
Attempt to implement changes necessary for JIT on Apple Silicon
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as described on https://developer.apple.com/documentation/apple-silicon/porting-just-in-time-compilers-to-apple-silicon
2021-04-28 14:58:24 -03:00
SachinVin
8856604383
test_arm_instructions.cpp: Fix missing }
2021-04-10 15:53:02 +05:30
SachinVin
358cf6f035
Merge pull request #1 from vitor-k/citra-m1
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fix compilation targeting arm64 macos
2021-03-30 11:17:13 +05:30
Vitor Kiguchi
883c8fc2ca
fix m1 compilation
2021-03-24 02:02:51 -03:00
xperia64
f9d84871fb
Add AArch64 fixups
2020-11-22 20:36:19 -05:00
SachinVin
232c2588ab
backend\A64\exception_handler_posix.cpp: remove unused header
2020-11-22 17:31:39 -05:00
SachinVin
9da8190874
backend\A64\exception_handler_posix.cpp: Fix typo in FindCodeBlockInfo
2020-11-22 17:31:39 -05:00
SachinVin
6fbe3bd275
tests/A32: remove unused function
2020-11-22 17:31:39 -05:00
SachinVin
b90d1921fa
backend/A64:port single stepping fix
2020-11-22 17:31:39 -05:00
SachinVin
50782502a6
travis : a64: remove docker; dont fuzz against unicorn
2020-11-22 17:31:39 -05:00
SachinVin
06d3b35549
backend/A64: Use ASSERT_FALSE where possible
2020-11-22 17:31:39 -05:00
SachinVin
43bd471949
backend\A64\block_of_code.cpp: Remove stray semicolon
2020-11-22 17:31:39 -05:00
SachinVin
5613c1a042
backend\A64\reg_alloc.cpp: Fix assert
2020-11-22 17:31:39 -05:00
SachinVin
38556d1bf2
CmakeLists: DYNARMIC_FRONTENDS optin for A64 backend
2020-11-22 17:31:39 -05:00
SachinVin
3113b830c1
frontend/A32: remove decoder hack vfp instructions
2020-11-22 17:31:39 -05:00
SachinVin
54113d4546
a64_emiter: CountLeadingZeros intrinsic shortcuts
2020-11-22 17:31:39 -05:00
BreadFish64
cbfbb0ef8b
emit_a64: get rid of useless NOP generation
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We don't actually patch anything in those locations beside a jump.
2020-11-22 17:31:39 -05:00
SachinVin
f42cba71bb
emit_a64: Do not clear fast_dispatch_table unnecessarily
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port 4305c74 - emit_x64: Do not clear fast_dispatch_table unnecessarily
2020-11-22 17:31:39 -05:00
SachinVin
e5ba462a5d
backend/A64/block_of_code.cpp: Clean up C style casts
2020-11-22 17:31:39 -05:00
SachinVin
30f5d5d354
backend/A64/a32_emit_a64.cpp: EmitA32{Get,Set}Fpscr, set the guest_fpcr to host fpcr
2020-11-22 17:31:39 -05:00
SachinVin
36c28648d7
backend/A64: Add Step
2020-11-22 17:31:39 -05:00
SachinVin
f9c841b66d
backend/A64/block_of_code: Always specify codeptr to run from
2020-11-22 17:31:39 -05:00
BreadFish64
af010996a5
backend/A64: fix mp
2020-11-22 17:31:39 -05:00
SachinVin
d472e5ba61
backend/A64: Move SP to FP in GenMemoryAccessors + Minor cleanup and
2020-11-22 17:31:39 -05:00
SachinVin
8e1f543bfb
backend/A64: Use X26 for storing remaining cycles.
2020-11-22 17:31:39 -05:00
BreadFish64
ec293f447b
backend/A64: add fastmem support
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fix crash on game close
fix generic exception handler
reorder hostloc gpr list
use temp register instead of X0 for writes
go back to regular std::partition
2020-11-22 17:31:39 -05:00
BreadFish64
0aa938209c
merge fastmem
2020-11-22 17:31:39 -05:00
SachinVin
1234add918
backend\A64\constant_pool.cpp: Correct offset calculation
2020-11-22 17:31:39 -05:00
SachinVin
b4239a6a06
backend/A64/a32_jitstate: Upstream changes from x64 backend
2020-11-22 17:31:38 -05:00
SachinVin
85b607bdaa
backend/A64: Add test for q flag being incorrectly set
2020-11-22 17:31:38 -05:00
SachinVin
35e40cb1a9
backend/A64/a32_emit_a64.cpp: Use unused HostCall registers
2020-11-22 17:30:50 -05:00
SachinVin
45b8f69855
backend/A64/a32_emit_a64.cpp: Use MOVP2R instead of MOVI2R.
2020-11-22 17:30:50 -05:00
SachinVin
9da0572c0d
backend/A64/abi: Fix FP caller and callee save registers
2020-11-22 17:30:50 -05:00
SachinVin
2752b9c4e5
a64/block_of_code: use GetWritableCodePtr() instead of const_cast<...>(GetCodePtr())
2020-11-22 17:30:50 -05:00
SachinVin
481af9f823
backend/A64/constant_pool: Clean up unused stuff
2020-11-22 17:30:50 -05:00
SachinVin
f837fab9dd
emit_a64_data_processing.cpp: remove pointless DoNZCV.
2020-11-22 17:30:50 -05:00
SachinVin
50bf478e6a
IR + backend/*: add SetCpsrNZCVRaw and change arg1 type of SetCpsrNZCV to IR::NZCV
2020-11-22 17:30:50 -05:00
SachinVin
16dbb68715
backend/A64: Fix ASR impl
2020-11-22 17:30:50 -05:00
SachinVin
f02ef43aa8
a64_emitter: Use Correct alias for ZR and WZR in CMP
2020-11-22 17:30:50 -05:00
SachinVin
0f3ef9babe
backend/A64: Use CSLE instead of branches for LSL LSR and ASR + minor cleanup
2020-11-22 17:30:50 -05:00
SachinVin
f661d13906
backend/A64: Use correct register size for EmitNot64
2020-11-22 17:30:50 -05:00
SachinVin
b4addd2564
tests/A32: Check if Q flag is cleared properly
2020-11-22 17:30:49 -05:00
SachinVin
7c7968741e
backend/A64: SignedSaturatedSub and SignedSaturatedAdd
2020-11-22 17:30:23 -05:00
SachinVin
131f9d69bd
backend/A64/emit_a64_saturation.cpp: Implement EmitSignedSaturation and EmitUnsignedSaturation
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Implements SSAT SSAT16 USAT USAT16 QASX QSAX UQASX UQSAX
2020-11-22 17:30:23 -05:00
SachinVin
5d0f1e84e8
backend/A64: add emit_a64_saturation.cpp
2020-11-22 17:30:23 -05:00
SachinVin
6cc068b8b9
backend/A64: Fix EmitA32SetCpsr
2020-11-22 17:30:23 -05:00
SachinVin
dbc7562190
backend/A64/devirtualize: remove unused DevirtualizeItanium
2020-11-22 17:30:23 -05:00
SachinVin
035dd1d2e0
backend/A64: refactor to fpscr from mxcsr
2020-11-22 17:30:23 -05:00
